Debugger for Xtensa® IDC20A (PACK)


Debugger for Xtensa® IDC20A (PACK)

Product number: LA-3211

Supports Xtensa Cores from Tensilica via an ARM JTAG interface

Core trace decoding for TRAX (Trace RAM within core logic) included

IDC20A debug cable, which supports 5-pin standard JTAG, cJTAG
(IEEE 1149.7) and serial Wire Debug (SWD), (0.4V - 5V)

Includes software for Windows, Linux and macOS

Requires PowerDebug module

Requires LA-3763 if 14 pin JTAG (Xtensa) connector is used