TRACE32 Instruction Set Simulators

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Debug and Trace Features
Peripheral Simulation Model
Tool Qualification Support-Kit

TRACE32 Instruction Set Simulators
Integral part of TRACE32
Configurable as system under debug (PBI=SIM)
Allows post-mortem debugging

Tool Qualification Support-Kit (TQSK) available for TriCore architecture

Software compatible to all TRACE32 tools
OS-aware debugging
Cache simulation (architecture dependent)
Program and data flow trace based on a bus trace protocol
Advanced trace analysis features
Powerful script language
Programming interface for peripheral simulation

Not available for processor architectures that support user-defined instructions

The TRACE32 Instruction Set Simulator is available for nearly all processor architectures supported by TRACE32. An intensive use of this tool requires a TRACE32 Simulator License.

Link Support
Technical Support
TRACE32 Simulator License

Demo Software for Download


Debug and Trace Features

  • Real-time, non-intrusive display of RTOS system resources
  • Task stack coverage
  • Task related breakpoints
  • Task context display
  • SMP support
  • Task related performance measurement
  • Statistic evaluation and graphic display of task run times
  • Task related evaluation of function run times
  • PRACTICE functions for OS data
  • Easy access via RTOS specific pull-down menus
  • Support for all major RTOSes

Trace Analysis
  • Detailed analysis of function run-times
  • Detailed analysis of task run-times and state
  • Graphical analysis of variable values over the time
  • Analysis of the time interval of a single event (e.g. Interrupt)
  • Analysis of the time interval between 2 defined events

Script Language
  • Structured Language
  • Menu Support
  • Command Logs
  • Custom Menues
  • Custom Toolbars and Buttons
  • Custom Dialog Windows
  • 64-Bit Arithmetic
  • Numeric, Logical and String Operators
  • Direct Access to System States


Peripheral Simulation Model

Lauterbach provides a TRACE32 Simulator API to write a Peripheral Simulation Model. The Peripheral Simulation Model has to be compiled as a library and loaded into TRACE32.


Tool Qualification Support-Kit

Since June 2021, Lauterbach has made available a Tool Qualification Support-Kit for its TRACE32 Instruction Set Simulator for TriCore (TSSTC) for a fee. After the TRACE32 Instruction Set Simulator has been qualified with the help of the TQSK for a safety-related project, it can be used as a test tool in the unit testing and integration phase, for example for PIL simulation or MC/DC coverage. Kits for further architectures are planned.

Block Diagram TRACE32 Instruction Set Simulator for TriCore

If you are interested in the TRACE32 Tool Qualification Support-Kit, please register at our TRACE32 TQSK Customer Interface. After registering, you can download a personalized version of the TRACE32 TQSK.

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Last generated/modified: 15-Jun-2022