Search results for "cortex-a5"
Agenda for training: Advanced debugging and tracing Arm Cortex in Italy
TRACE32 Verilog Back-End for Cortex-A5x for RTL Simulations when the VPI interface is supported support for JTAG access Requires RLM floating license server Please add the RLM HostID of the license server to your order (please see our FAQ)
Agenda for our training Tracing for ARM/Cortex in Germany
Supports 5-pin standard JTAG, cJTAG and Serial Wire Debug Port for Arm Cortex-M cores Bandwidth of 200 MBit/s per trace channel includes 256-MByte of trace RAM to support: - ITM via Serial Wire Output/TPIU - ETM Cortex-M continuous mode via TPIU (4-bit) Trace Streaming up to 100 MByte/s requires USB 3.0 (SuperSpeed) capable host computer Concurrent debugging of two or more Cortex-M cores requires a License for Multicore Debugging (LA-7960X)
All-In-One Debug and Trace Solution for Arm Cortex-M. Supports 5-pin standard JTAG, cJTAG and Serial Wire Debug Port for Arm Cortex-M cores and SecurCore SC000/SC300 Includes 256-MByte of trace RAM to support: - ITM via Serial Wire Output/TPIU - ETM Cortex-M continuous mode via TPIU (4-bit) Bandwidth of 400 MBit/s per trace channel. Trace Streaming up to 100 MByte/s requires USB 3.0 (SuperSpeed) capable host computer Concurrent debugging of two or more Cortex-M cores requires a License for Multicore Debugging MicroTrace (LA-7960N) Can not be upgraded to include support for other core architectures. Extend your MicroTrace with a Mixed-Signal Probe (LA-2500), to record and correlated digital and analog signals.
Supports 5-pin standard JTAG, cJTAG and Serial Wire Debug Port for Arm Cortex-M cores Bandwidth of 400 MBit/s per trace channel includes 256-MByte of trace RAM to support: - ITM via Serial Wire Output/TPIU - ETM Cortex-M continuous mode via TPIU (4-bit) Trace Streaming up to 100 MByte/s requires USB 3.0 (SuperSpeed) capable host computer Concurrent debugging of two or more Cortex-M cores requires a License for Multicore Debugging uTrace (LA-4534X)
Here you can find a list of all recently published press releases of Lauterbach.
Supports Armv7-A/R based Cortex-A and Cortex-R 32-bit cores supports 5-pin standard JTAG, cJTAG and Serial Wire Debug Port (0.4 V - 5 V) includes software for Windows, Linux and MacOSX requires Power Debug Module cJTAG and SWD require Power Debug Interface USB 2.0/USB 3.0, Power Debug Ethernet, PowerTrace, Power Debug II or PowerDebug PRO
supports Qorivva MPC5xxx/SPC5xxx (e200 cores) and Freescale PX SERIES processors eTPU, GTM and SPT debugging included includes software for Windows, Linux and MacOSX requires Power Debug Module Concurrent debugging of multiple e200 cores on multicore processors requires a License for Multicore Debugging (LA-7960X) (not necessary for lockstep mode) debug cable with 14 pin connector