RISC-V Trace


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Solutions


Proprietary SiFive Nexus Trace Solution for RISC-V
  • SiFive cores only
  • Based on Nexus message protocol
  • Instruction trace
  • Trace protocol may include timestamps
  • Multicore tracing
  • Support for pure SiFive trace infrastructure or SiFive trace IP integrated into an Arm CoreSight trace infrastructure

Tessent Embedded Analytics Trace Solution for RISC-V
  • Compliant to Efficient Trace for RISC-V Version 1
  • Instruction trace
  • Data trace, if supported by the implemented trace IP
  • Timestamps, if supported by the implemented trace IP
  • Multicore tracing
  • Trace filters allow to reduce the generation of trace messages
  • Support for Tessent Embedded Analytics only trace infrastructure and Tessent Embedded Analytics trace IP integrated into an Arm CoreSight trace infrastructure





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Last generated/modified: 12-Jul-2021