RISC-V Debugger


The embedded tools company
RISC-V Ecosystem
Adaptation
Real-time Trace
TRACE32 Debug Features


RISC-V Debugger
  Highlights
Support for JTAG interface (JTAG Debug Transport Module)
Multicore debugging
Debug from reset vector or attach to target without altering its state
Run-control debugging via abstract commands and debug program buffer
Support RV32 and RV64 ISA
Support standard ISA extensions: compressed instructions, floating point, etc.
Flash programming
Easy high-level and assembler debugging
Unlimited number of software breakpoints
Onchip breakpoints on instructions and data (match control trigger)
Display of configuration registers and peripherals at a logical level
Target OS awareness
Script language and API interface


Support
Technical Support



 

RISC-V Ecosystem


Supported Compilers
Compiler Support

C++

  • GCC (GNU)
  • ELF/DWARF
RTOS
RTOS Support (64-bit)
 

Adaptation


Adaptation RISC-V Debugger

 

Real-time Trace


RISC-V Trace
  • Proprietary SiFive Nexus Trace Solution for RISC-V
  • Proprietary UltraSoC Trace Solution for RISC-V
  • Support for both, complete proprietary trace infrastructure and proprietary trace IP integrated into an Arm CoreSight trace infrastructure
  • Multicore tracing
  • On-chip trace and various types of off-chip trace ports

 

TRACE32 Debug Features


Multicore Debugging
  • Debugger for all cores of a multicore chip
  • Debugging of application cores, DSPs, accelerator cores and special-purpose cores
  • Debugging of more than 80 core architectures
  • Support for every multicore topology
  • Support for all multicore operation modes
  • Support for AMP and SMP systems
  • Single debug hardware can be licensed for all cores of a multicore chip

Logical Display of Peripherals
  • Display of onchip peripherals
  • User definable windows
  • Interactive window definition with softkey support
  • Pulldown menues for selection of choices
  • Additional description for each field

FLASH Programming (Memory-Mapped)
  • Optimum flash programming performance
  • Support for all file formats
  • Ready-to-run flash scripts
  • Ready-to-use flash programming algorithms
  • Dialog- or command-based programming as well as full scripting
  • Full awareness of sensitive data
  • Flash declaration via CFI
  • Easy handling of different flash types on a target
  • Software breakpoints in flash
  • Simple code patching in flash
  • Flash programming via boundary scan

FLASH Programming (Protocol-Based)
  • Optimum flash programming performance
  • Support for elf, Intel hex and S-record format
  • Ready-to-use flash programming scripts
  • Ready-to-use flash programming algorithms
  • Memory dump for displaying the flash content
  • Flash content can be easily copied and modified
  • Flash programming via boundary scan (SPI, eMMC, I2C)
  • Full programming access to spare area (NAND)
  • Bad block treatment (NAND)
  • ECC generation: Hamming, BCH, Reed-Solomon (NAND)

OS-aware Debugging
  • Real-time, non-intrusive display of RTOS system resources
  • Task stack coverage
  • Task related breakpoints
  • Task context display
  • SMP support
  • Task related performance measurement
  • Statistic evaluation and graphic display of task run times
  • Task related evaluation of function run times
  • PRACTICE functions for OS data
  • Easy access via RTOS specific pull-down menus
  • Support for all major RTOSes

Sample-based Profiling
  • Long-time performance analysis for functions
  • Long-time performance analysis for tasks
  • Long-time analysis of the contents of a variable or memory location and more

Script Language PRACTICE
  • Structured Language
  • Menu Support
  • Command Logs
  • Custom Menues
  • Custom Toolbars and Buttons
  • Custom Dialog Windows
  • 64-Bit Arithmetic
  • Numeric, Logical and String Operators
  • Direct Access to System States





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Last generated/modified: 09-Sep-2020