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- 100 mil to 50 mil Adapters
- Small Footprint for Target Connector
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 C
- CARH850 (RENESAS)
- ELF/NEC
- VX-RH850 (TASKING)
- ELF/DWARF
C/C++
- GREENHILLS-C (GREENHILLS)
- ELF/DWARF
- ICCRH850 (IAR)
- UBROF
- CUBESUITE+ (RENESAS)
- ELF
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More TRACE32 Tools for RH850
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- Front-end to third-party virtual targets
- Front-end to third-party core simulators
- Front-end to third-party target servers
- Front-end to TRACE32 Back-End
- Same GUI as TRACE32 hardware debuggers
- Debug features as provided by third-party software/TRACE32 Back-End
- Trace features as provided by third-party software/TRACE32 Back-End
- Windows, Linux and MacOSX
- Reprise RLM floating licenses
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- Program flow via Branch Trace Messages (BTM)
- Data Trace Messaging supported (DTM)
- Supports onchip peripheral block tracing
- Multicore tracing
- Trace-based debugging
- Full support for trigger and filter features
- Up to 8 GByte trace memory
- 5 ns off-chip time stamp
- Comprehensive program profiling
- Target-OS aware profiling
- Code coverage
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- Aurora NEXUS high-speed serial trace
- Program flow via Branch Trace Messages (BTM)
- Data Trace Messaging supported (DTM)
- Supports onchip peripheral block tracing
- Multicore tracing
- Comprehensive program profiling
- Target-OS aware profiling
- Code coverage
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- 4 GByte trace memory
- Universal module that is prelicensed for a trace protocol on delivery
- Additional trace protocol licenses can be added
- Up to 12.5 Gbit/s per lane
- Maximum bandwidth of 100 GBit/s
- Aurora-based trace protocols up to 8 RX lanes
- PCIe 3.0-based trace protocol up to 8 RX/TX lanes
- Reference-clock and bit-clock support
- Fast trace upload to the host computer
- Support for TRACE32 Streaming up to 400 MByte/s
- Additional independent 17 channel logic analyzer (with included Standard Probe)
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- Debugger for all cores of a multicore chip
- Debugging of application cores, DSPs, accelerator cores and special-purpose cores
- Debugging of more than 80 core architectures
- Support for every multicore topology
- Support for all multicore operation modes
- Support for AMP and SMP systems
- Single debug hardware can be licensed for all cores of a multicore chip
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- Display of onchip peripherals
- User definable windows
- Interactive window definition with softkey support
- Pulldown menues for selection of choices
- Additional description for each field
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- Supports multiple languages
- Full support for C++
- Integrated into TRACE32 environment
- Supports most compilers and hosts
- Same user interface on different hosts
- High speed download
- Debugs optimized code
- Display of function nesting
- Display of linked lists
- Powerful expression evaluation
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- Real-time, non-intrusive display of RTOS system resources
- Task stack coverage
- Task related breakpoints
- Task context display
- SMP support
- Task related performance measurement
- Statistic evaluation and graphic display of task run times
- Task related evaluation of function run times
- PRACTICE functions for OS data
- Easy access via RTOS specific pull-down menus
- Support for all major RTOSes
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- Samples memory while application is running
- Support for special debug communication channels
- All trace display and analysis functions can be used
- Trigger on specific values
- Dynamic performance analysis
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- Long-time performance analysis for functions
- Long-time performance analysis for tasks
- Long-time analysis of the contents of a variable or memory location and more
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- Structured Language
- Menu Support
- Command Logs
- Custom Menues
- Custom Toolbars and Buttons
- Custom Dialog Windows
- 64-Bit Arithmetic
- Numeric, Logical and String Operators
- Direct Access to System States
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Flyer: Multicore Debug and Trace for RH850
Adaptation
