Search results for "andes"
Allows the use of the ISS TQSK Test Suite to qualifiy the TRACE32 Instruction Set Simulator for Arm. Floating license via RLM (Reprise License Manager). For Windows, Linux, and macOS. Requires LA-2804L Floating License TRACE32 Arm Simulator. Requires TRACE32 release R.2023.09.000166373 (SP2). Please add the RLM HostID of your license server to your order or add LA-9070L New Cloud Access Token to get a new license server in the Lauterbach RLM Cloud.
CAN termination (120 Ohm) with one female and one male D-Sub-9 connector connects all pins between both connectors with 120 Ohm resistor between line 2 and 7.
Thunderbolt™ 3 Cable for up to 40 Gb/s with USB Type-C™ 24 pin connectors on both ends. Length: 500mm
License to enable fast memory transactions and tracing via a high-speed debug port (HSDP) available on some Versal SoCs from AMD/Xilinx. Architecture independent license. Trace decoding requires an additional architecture-specific license, which is usually included with your PowerTrace Serial. Please add the serial number of your PowerTrace Serial to your order. It is recommended to use the HSDP Adapter LA-3585 in addition to this license.
Adapter for debugging over a CAN bus with up to 8 Mbit/s supporting DAP over CAN Physical Layer (DXCPL), DAP over CAN Message (DXCM) and Single Signal Debug Port (SSDP). Includes a removable CAN termination resistor (120 Ohm). Requires an AUTO26 Debug Cable V3 (LA-3011), AUTO26 Debug Cable V2 (LA-3010), or a CombiProbe2 with AUTO26 Whisker (LA-3081). Requires PowerView software R.2024.02 or newer. For Arm® Cortex®-based SoCs, please order pack LA-3256 instead, which includes this CAN box together with a suitable debug cable.
TRACE32 Front-End license for debugging a third-party virtual target/simulator for the SPT architecture. Floating license via RLM (Reprise License Manager). Please add the RLM HostID of the license server to your order.
TRACE32 Back-End License to debug 32 bit RISC-V cores (RV32) on RTL Simulations using the Verilog Procedural Interface Interface (VPI). Only JTAG via VPI is supported. Requires a RISC-V Front-End license (LA-8910L) Requires RLM floating license server. Please add the RLM HostID of the license server to your order.
License for debugging the SPT architecture via Generic Transactor Library for Windows and Linux. For RTL emulation/simulation requires that EDA partner supports GTL interface. Floating license via RLM (Reprise License Manager). Please add the RLM HostID of the license server to your order.
Adapter for PowerTrace Serial to support HSDP on Versal SoCs from AMD/Xilinx, for real-time tracing and fast memory transactions. Requires LA-3551X "License for HSDP". Trace decoding requires an additional architecture-specific license, which is usually included with your PowerTrace Serial. The adapter gets plugged to SERIAL PORT 1 (80-pin) of a PowerTrace Serial.
For debugging of Armv8 and Armv9 cores via Single Signal Debug Port (SSDP) Supports Armv8 and Armv9 based Cortex-A, Cortex-R, Cortex-X and Neoverse 32/64-bit cores. GTM, SPT, IPU and Multicore debugging included. Includes software for Windows, Linux and macOS. Requires PowerDebugInterface USB 2.0/USB 3.0, PowerDebugEthernet, PowerTrace Ethernet, PowerDebugII, PowerDebug PRO, PowerDebug E40 or PowerDebug X50. Requires PowerView software R.2024.02 or newer.