TRACE32 Debugger for LM3S1P51

Supports 5-pin standard JTAG, cJTAG and
Serial Wire Debug Port for
Arm Cortex-M cores and SecurCore SC000/SC300

Bandwidth of 400 MBit/s per trace channel

includes 256-MByte of trace RAM to support:
- ITM via Serial Wire Output/TPIU
- ETM Cortex-M continuous mode via TPIU (4-bit)

Trace Streaming up to 100 MByte/s requires
USB 3.0 (SuperSpeed) capable host computer

Concurrent debugging of two or more
Cortex-M cores requires a
License for Multicore Debugging MicroTrace (LA-7960N)

Can not be upgraded to include support for
other core architectures