R8051XC Debugger

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IDE - Integrated Development Environment
Details and Configurations

R8051XC Debugger
Full HLL and ASM Support available
Batch Processing
Keil, Tasking and GNU Compiler support
Break on Code or Data
Unlimited Software Breakpoints
Internal Trigger support
Dis/Assembly Support for SFRs
Extended Memory Banking Support

[www.cast-inc.com]  CAST, Inc.

Demo Software for Download



Full Memory Access

  • Program and Internal, Direct, eXternal Data memories
  • 8051 memory bit addressing support
  • Special Function Register (SFR) definition via debug symbols or PRACTICE script

Full Onchip Breakpoint support

  • Program breakpoints
  • Address range read/write breakpoints
  • Data memory read/write breakpoints

Variable Debug Clock Speed

  • 10 kHz...50 MHz
  • up to 1/2 of the core clock
  • variable up to 100 MHz

Multicore Debugging

  • Multicore debugging via JTAG Daisy Chain
  • Other multicore configurations on request

IDE - Integrated Development Environment


Details and Configurations

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The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice. Report Errors
Last generated/modified: 09-Jan-2023