The C7000 is usually debugged as part of an Arm Cortex-based multicore chip. In these cases, it is sufficient to extend the TRACE32 Debug Cable by a C7000 A-license.
However, it is also possible to debug a pure C7000 chip.
- Display of onchip peripherals
- User definable windows
- Interactive window definition with softkey support
- Pulldown menues for selection of choices
- Additional description for each field
- Real-time, non-intrusive display of RTOS system resources
- Task stack coverage
- Task related breakpoints
- Task context display
- SMP support
- Task related performance measurement
- Statistic evaluation and graphic display of task run times
- Task related evaluation of function run times
- PRACTICE functions for OS data
- Easy access via RTOS specific pull-down menus
- Support for all major RTOSes
- Structured Language
- Menu Support
- Command Logs
- Custom Menues
- Custom Toolbars and Buttons
- Custom Dialog Windows
- 64-Bit Arithmetic
- Numeric, Logical and String Operators
- Direct Access to System States
C7000 Specific Debug Features
Benchmark counters are on-chip counters that count specific hardware events. A typical example are counters for cache hits and misses allowing the calculation of the corresponding performance metrics.
- Configuration and observation of
On-chip performance counters of cores, counting, e.g., executed instructions, cache hits and cache misses, CPU stalls, ...
- Periodically read-out of counters during runtime (Snooper).
The instruction and data caches on C7000 devices can be accessed with TRACE32.
- For each cache line valid bit, dirty flag, secure flag and coherency state are available.
- Cached memory regions can be highlighted in the respective windows, e.g. the Data.dump or the List.auto window.
- When debugging, TRACE32 can be configured to transparently display variable values from the cache (i.e. from the CPUs point of view).
- In-depth cache analysis is provided with the CACHE command group.
- C7000 trace integrated into an Arm CoreSight trace infrastructure
- Program and data trace
- Trace protocol may include global timestamps
- Multicore tracing
- Trace filter allow to reduce the generation of trace messages
- Onchip trace and CoreSight TPIU