The C5500 is usually debugged as part of an Arm Cortex-based multicore chip. In these cases, it is sufficient to extend the TRACE32 Debug Cable by a C5500 A-license.
However, it is also possible to debug a pure C5500 chip.
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- Display of onchip peripherals
- User definable windows
- Interactive window definition with softkey support
- Pulldown menues for selection of choices
- Additional description for each field
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- Optimum flash programming performance
- Support for all file formats
- Ready-to-run flash scripts
- Ready-to-use flash programming algorithms
- Dialog- or command-based programming as well as full scripting
- Full awareness of sensitive data
- Flash declaration via CFI
- Easy handling of different flash types on a target
- Software breakpoints in flash
- Simple code patching in flash
- Flash programming via boundary scan
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- Optimum flash programming performance
- Support for elf, Intel hex and S-record format
- Ready-to-use flash programming scripts
- Ready-to-use flash programming algorithms
- Memory dump for displaying the flash content
- Flash content can be easily copied and modified
- Flash programming via boundary scan (SPI, eMMC, I2C)
- Full programming access to spare area (NAND)
- Bad block treatment (NAND)
- ECC generation: Hamming, BCH, Reed-Solomon (NAND)
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- Real-time, non-intrusive display of RTOS system resources
- Task stack coverage
- Task related breakpoints
- Task context display
- SMP support
- Task related performance measurement
- Statistic evaluation and graphic display of task run times
- Task related evaluation of function run times
- PRACTICE functions for OS data
- Easy access via RTOS specific pull-down menus
- Support for all major RTOSes
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- Structured Language
- Menu Support
- Command Logs
- Custom Menues
- Custom Toolbars and Buttons
- Custom Dialog Windows
- 64-Bit Arithmetic
- Numeric, Logical and String Operators
- Direct Access to System States
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C5500 DSP Ecosystem
