Product Catalogue

supports RISC-V MIPI10 / MIPI20 connector on the target required: LA-3770 ARM Converter ARM-20 to MIPI-10/20/34 ALTERA-10/RISCV-10 connector on the target required: LA-3863 Converter ARM-20 to ALTERA-10/RISCV-10 includes software for Windows, Linux and MacOSX requires Power Debug Module voltage range 1.8V to 3.6V

Supports RISC-V 32-bit cores MIPI10 / MIPI20 connector on the target requires: LA-3770 Converter IDC20A to MIPI-10/20/34 ALTERA-10/RISCV-10 connector on the target requires: LA-3863 Converter IDC20A to ALTERA-10/RISCV-10 Includes software for Windows, Linux and macOS. Requires TRACE32 software R.2020.09 or newer. Requires Power Debug Module

Supports RISC-V 64-bit cores Multicore debugging included MIPI10 / MIPI20 connector on the target requires: LA-3770 Converter IDC20A to MIPI-10/20/34. ALTERA-10/RISCV-10 connector on the target requires: LA-3863 Converter IDC20A to ALTERA-10/RISCV-10. Includes software for Windows, Linux and macOS. Requires TRACE32 software R.2020.09 or newer. Requires Power Debug Module.

Supports RISC-V 32-bit cores Only sold as part of a package for MicroTrace for RISC-V 32-Bit

Debug solution for RISC-V 32-bit standard core(s). Concurrent debugging of two or more RISC-V 32-bit standard cores requires a License for Multicore Debugging MicroTrace (LA-7960N). Can not be upgraded to include support for other core architectures.

Supports RISC-V 32-bit cores. Multicore debugging included. Includes software for Windows, Linux and macOS. Requires a debug cable with a debug license for RISC-V 64-bit cores. Requires a debug cables newer than 08/2008. Requires TRACE32 software R.2020.09.

Preprocessor for Trace RISC-V tested for SiFive Nexus IP tested for UltraSoc Trace Encoder IP other IP on request Variable threshold level and termination voltage, AUTOFOCUS self calibration technology, Voltage: 1.2 to 3.3V - else contact support Traceport: 1-32bit Bandwidth: 9.6 Gbps (300MHz clock speed, DDR) Connector: 2x38 pin mictor connector Requires PowerTrace Version 6 or higher or PowerTrace II / III

Supports RISC-V 32-bit cores. Includes software for Windows, Linux and macOS. Requires a debug cables newer than 08/2008. Requires TRACE32 software R.2020.09.

Supports RISC-V 64-bit cores. Multicore debugging included. Includes software for Windows, Linux and macOS. Requires a debug cables newer than 08/2008. Requires TRACE32 software R.2020.09.

supports RISC-V 64-bit cores Multicore debugging included only suitable for debug cables newer than 08/2008 includes software for Windows, Linux and macOS requires TRACE32 software R.2020.09

Supports Trace for RISC-V - tested for SiFive Nexus IP - tested for Tessent Embedded Analytics (former UltraSoC) Trace Encoder IP other IP on request Please add the base serial number of your existing debug cable to your order.

Trace license to support trace decoding for RISC-V, applicable to AutoFocus II preprocessor. Tested for SiFive Nexus IP. Tested for Trace Encoder IP from Tessent Embedded Analytics (former UltraSoC) . Other IP on request Requires an AutoFocus II preprocessor with a base serial number of C1210xxxxxxx or higher. Please add the base serial number of your existing AutoFocus II preprocessor to your order.

Supports off-chip trace port for RISC-V tested for SiFive Nexus IP tested for UltraSoc Trace Encoder IP other IP on request if applied to PowerTrace Serial please add the serial number of the PowerTrace Serial to your order

Trace license to support trace decoding for RISC-V, applicable to AutoFocus II or a PowerTrace Serial. Tested for SiFive Nexus IP. Tested for Trace Encoder IP from Tessent Embedded Analytics (former UltraSoC) . Other IP on request If the license is applied to an AutoFocus II preprocessor, the preprocessor must have a base serial number of C1210xxxxxxx or higher. Please add the base serial number of your existing AutoFocus II preprocessor or PowerTrace Serial to your order.

Core trace decoding for RISC-V architecture floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

TRACE32 Front-End connecting to - virtual target via MCD interface - third-party target server such as GDB supports RISC-V floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

Floating license to use the TRACE32 Instruction Set Simulator for automated tests via script language PRACTICE or via the TRACE32 Remote API Supports RISC-V For Windows, Linux, and macOS. Floating license via RLM (Reprise License Manager) Please add the RLM HostID of the license server to your order (please see our FAQ)

tested for SiFive Nexus IP tested for Tessent Embedded Analytics (former UltraSoc) Trace Encoder IP other IP on request Variable threshold level and termination voltage, AUTOFOCUS self calibration technology, Voltage: 1.2 to 3.3V - else contact support Traceport: 1-32bit Bandwidth: 9.6 Gbps (300MHz clock speed, DDR) Connector: 2x38 pin mictor connector Requires PowerTrace Version 6 or higher or PowerTrace II / III

Converter from IDC20A to 12 pin PMOD connectors with the JTAG pinout from SiFive. The adapter exists in two variants: with male and female PMOD connector. This adapter has the male PMOD connector. PMOD is an open standard defined by Digilent for peripherals used with FPGAs or microcontrollers. The PMOD pinout of this adapter does ONLY work with targets that use the pinout that was defined by SiFive. So it is not a general/official RISC-V pinout. In case of FPGA boards, the pinout may depend on the used FPGA image.

Converter from IDC20A to 12 pin PMOD connectors with the JTAG pinout from SiFive. The adapter exists in two variants: with male and female PMOD connector. This adapter has the female PMOD connector. PMOD is an open standard defined by Digilent for peripherals used with FPGAs or microcontrollers. The PMOD pinout of this adapter does ONLY work with targets that use the pinout that was defined by SiFive. So it is not a general/official RISC-V pinout. In case of FPGA boards, the pinout may depend on the used FPGA image.