TRACE32 Debugger for ARRIAVSOC

License for debugging the Cortex-A/R (Armv7) architecture
via "Software Debugging over XCP" protocol
specified by ASAM e.V. as well as the ETAS-specific
debugging protocol

floating license via RLM (Reprise License Manager)

Please add the RLM HostID of the license server
to your order (please see our FAQ)

Allows Processor-in-the-Loop Simulation for MATLAB

Architecture independent license

for Windows32, Windows64, Linux32, Linux64
and Solaris, other platforms on request

All TRACE32 Front-End instances have to run
on the same host

Floating license via RLM (Reprise License Manager)

Please add the RLM HostID of the license server
to your order (please see our FAQ)

License to use TRACE32 PowerView Front-End

TRACE32 PowerView Front-End can be used to connect to
third-party solutions such as:
- virtual target/simulators
- target server such as GDB
For details please refer to tool chain support list for
your core architecture

supports Arm based architectures

floating license via RLM (Reprise License Manager)

Please add the RLM HostID of the license server
to your order (please see our FAQ)

Core trace decoding for Arm/Cortex architecture

floating license via RLM (Reprise License Manager)

Please add the RLM HostID of the license server
to your order (please see our FAQ)