ARM/Cortex ETM (serial)


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Speed
Generic Trace Features
Adaption


ARM/Cortex ETM (serial)
  Highlights
Support of High-Speed Serial Trace Port (ETM-HSSTP, ARM specified)
Compatible to Xilinx Aurora protocol
Support of up to four differential lanes
Maximum 6,25Gbit/s lane speed
Up to 8 GByte trace buffer size, sufficient for up to 48 Giga CPU cycles




 

Speed


The max. supported speed of the Serial Trace Port depends on the number of differential trace port lanes.
  • 6.250 Gbit/s per lane (up to three lanes)
  • 3.125 Gbit/s per lane (at four lanes)
 

Generic Trace Features


Trace-based Profiling
  • Detailed analysis of function run-times
  • Detailed analysis of task run-times and state
  • Graphical analysis of variable values over the time
  • Analysis of the time interval of a single event (e.g. Interrupt)
  • Analysis of the time interval between 2 defined events

AUTOSAR Profiling
  • Long-term commitment to AUTOSAR as active contributor
  • Profiling for AUTOSAR Classic and Adaptive Platform
  • Profiling for ORTI and ARTI
  • Longstanding close partnership with AUTOSAR providers
  • Concurrent profiling of AUTOSAR Classic and Adaptive Platform

Trace-based Code Coverage
  • Provides all metrics for functional safety
  • For standard trace protocols TRACE32 Code Coverage gets by with no or very little instrumentation, full instrumentation as fallback
  • Suitable for long-term testing
  • Automated report generation in multiple exchange formats
  • TRACE32 Trace-Based Code Coverage is included in the scope of delivery of all TRACE32 Debug & Trace Tools at no additional cost

 

Adaption


Adaptation for Arm HSSTP





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Last generated/modified: 02-Jan-2023