Cortex-R JTAG Debugger

The embedded tools company

Easy high-level and assembler debugging
Interface to all compilers
RTOS awareness
Display of internal and external peripherals at a logical level
Flash programming
Powerful script language
Support for CoreSight components like Debug Access Port, Trace Funnel, Trace Port Interface Unit, Embedded Trace Buffer, Cross Trigger Interface, Cross Trigger Matrix, System Trace Module, Trace Memory Controller
Real-time access to system memory and peripheral registers through Debug Access Port without halting the core
Multicore debugging
Multiprocessor debugging
Software compatible to all TRACE32 tools
High-Speed download
Active Debugger controlled by PowerPC

Link Support
Technical Support
[]  CoreSight On-chip Debug & Trace IP





Software Compatible to In-Circuit Emulator

  • Operation System
  • ASM Debugger
  • HLL Debugger for C,C++
  • Peripheral Windows

High-Speed Download

  • Up to 1.48@50MHz MByte/sec

Variable Debug Clock Speed

  • Up to 100 MHz


  • Input from PODBUS
  • Output to PODBUS

Support for EPROM/FLASH Simulator

  • Breakpoints in ROM Area
  • 8, 16 and 32 Bit EPROM/FLASH Emulation

Multicore-Debugging with DSPs

  • Ceva and DSPGroup JTAG Interface
  • Full HLL and ASM support available
  • Graphical Variables Display
  • Batch Processing
  • Unlimited Software Breakpoints
  • Onchip Breakpoints
  • Multicore debugging

Power Consumption

  • 5 W


Adaption for ARM Debug Cable

Adaption for ARM CombiProbe


IDE - Integrated Development Environment

ASM Debugger
  • Supports almost all file formats
  • Assembler source-level debugging
  • Advanced memory display
  • Inline assembler
  • Memory tests
  • Customizable windows
  • Peripheral windows
  • Terminal window
  • Semi-hosting
  • Flash programming
  • Full support for peripherals
High-Level-Language Debugging
  • Supports multiple languages
  • Full support for C++
  • Integrated into TRACE32 environment
  • Supports most compilers and hosts
  • Same user interface on different hosts
  • High speed download
  • Debugs optimized code
  • Display of function nesting
  • Display of linked lists
  • Powerful expression evaluation
Compiler Support


  • CARM (ARM Germany GmbH)
  • ARMCC (ARM Ltd.)
  • AIF
  • GCCARM (Free Software Foundation, Inc.)
  • GREENHILLS-C (Greenhills Software Inc.)
  • ICCARM (IAR Systems AB)
  • ICCV7-ARM (Imagecraft Creations Inc.)
  • HIGH-C (Synopsys, Inc)
  • TI-C (Texas Instruments)
  • COFF
  • GNU-C (Wind River Systems)
  • COFF
  • D-CC (Wind River Systems)
  • ELF


  • ARM-SDT-2.50 (ARM Ltd.)
  • GCCARM (Free Software Foundation, Inc.)
  • GNU (Free Software Foundation, Inc.)
  • GCCARM (Free Software Foundation, Inc.)
  • GREENHILLS-C++ (Greenhills Software Inc.)
  • MSVC (Microsoft Corporation)
  • EXE/CV5
  • HIGH-C++ (Synopsys, Inc)


  • XCODE (Apple Inc.)
  • Mach-O
Multicore Debugging
  • Debugger for all cores of a multicore chip
  • Debugger for application cores, DSPs, accellerator cores and special-purpose cores
  • Debugger for more than 80 core architectures
  • Support for every multicore topology
  • Support for all multicore operation modes
  • Support for AMP and SMP systems
  • Single debug hardware can be licensed for all cores of a multicore chip
Logical Display of Peripherals
  • Display of onchip peripherals
  • User definable windows
  • Interactive window definition with softkey support
  • Pulldown menues for selection of choices
  • Additional description for each field
Full MMU Support
  • Full integrated support of processor's MMU
  • Display of processor MMU registers
  • Display of MMU table entries
  • Display of address translation table
  • 'Shadowing' MMU address translation inside debugger
  • Full virtual and physical access to target at any time
  • Debugger has optionally write access to write protected memory areas
  • Detection and decoding of software MMU tables built by operating systems
  • Support for several user space MMU tables side by side
  • TLB context tracking and git statistics via CTS
Script Language PRACTICE
  • Structured Language
  • Menu Support
  • Command Logs
  • Custom Menues
  • Custom Toolbars and Buttons
  • Custom Dialog Windows
  • 64-Bit Arithmetic
  • Numeric, Logical and String Operators
  • Direct Access to System States
NOR FLASH Programming
  • Internal and/or external NOR FLASH memories
  • All common NOR FLASH types
  • Programming of multiple NOR FLASH devices
  • Provided by debuggers and in-circuit emulators
NAND FLASH Programming
  • Generic and CPU-specific NAND FLASH controllers
  • Support all common NAND FLASH devices
  • Bad block treatment (skipped, reserved block area)
  • ECC generation
TRACE32 Instruction Set Simulators
  • Integral part of TRACE32
  • Configurable as system under debug (PBI=SIM)
  • Allows post-mortem debugging
  • Software compatible to all TRACE32 tools
  • Easy high-level and assembler debugging
  • OS-aware debugging
  • Cache simulation (architecture dependent)
  • Program and data flow trace based on a bus trace protocol
  • Advanced trace analysis features
  • Powerful script language
  • Programming interface for peripheral simulation
  • Not available for the MIPS architecture
  • Not available for processor architectures that support user-defined instructions
Trace-based Profiling
  • Detailed analysis of function run-times
  • Detailed analysis of task run-times and state
  • Graphical analysis of variable values over the time
  • Analysis of the time interval of a single event (e.g. Interrupt)
  • Analysis of the time interval between 2 defined events
Trace-based Code Coverage
  • Real-time code coverage without instrumentation
  • Suitable for long-term testing
  • Analysis for both assembly and source code level
  • Off-line review capabilities
  • Full support of multicore chips
Sample-based Profiling
  • Long-time performance analysis for functions
  • Long-time performance analysis for tasks
  • Long-time analysis of the contents of a variable or memory location and more
  • Software trace of any size stored in an array structure on the target
  • General trace format provided by TRACE32-PowerView
  • Configuration and display commands provided by TRACE32-PowerView
  • Works as trace with address and data information
  • Works as a program flow trace (SH4, PowerPC)
  • Time stamp possible
  • Predefined algorithms to fill the trace provided by Lauterbach
  • User defined algorithms to fill the trace also possible
FDX (Fast Data eXchange) Framework
  • Interaction of target application with 3rd party host application
  • No additional hardware necessary
  • High bandwidth
  • Real time data transfer
  • Software trace capabilities
  • Samples memory while application is running
  • Support for special debug communication channels
  • All trace display and analysis functions can be used
  • Trigger on specific values
  • Dynamic performance analysis
RTOS Support
3rd Party Integration
3rd Party Tool Integration
Help System
  • Acrobat Based Documentation
  • Fast Text Search
  • Device Specific Filtering
  • Basic and Advanced Help
  • Training Manuals Included
  • WWW Update

Compatible ROM Monitors

Monitor for OSE (ARM)
  • Attaching TRACE32 Debugger to OSE Debug Server
  • No hardware required (just Ethernet connection)
  • Debugging via Ethernet
  • Debugging one process, while others keep running
  • Debugging of OSE Load Modules
  • Simultaneous debugging in Run Mode and Freeze Mode by ICD

ARM and XSCALE Monitor
  • Compatible with Emulator and Debuggers
  • Support for C, C++, JAVA and ASM
  • Communication via Eprom/FLASH Simulator
  • Communication via RS232 or customized .DLL link
  • Monitor Code with Source
  • Monitor Code Royalty Free


Software Trace Tools

ETB Trace
  • Compatible to external ETM Trace
  • Readout through JTAG
  • No Speed Limit
  • Full Trace of Code and Data


Hardware Trace Tools

Logic Analyzer
  • Timing Analyzer with 500 MHz on all Channels
  • State Analyzer up to 200 MHz DDR
  • 204 Input Channels
  • Transient Recording
  • Time Correlation with other Tracetools
  • Clock Qualifier for State Clock
  • Mixed State and Timing Mode
  • 4 Clock Inputs
  • MICTOR and Standard Probes (single ended)
  • MICTOR differential Probes
  • Analog Voltage and Current Probe
  • 3G/DigRF Protocol Support

ETM Trace
  • Up to 4 GByte trace buffer
  • Target voltage 1.2 .. 3.3 V
  • 5 ns time stamp
  • Program and data trace
  • Performance analysis
  • Function and task run-time measurement
  • Code coverage
  • Support for Embedded Trace Macrocell (ETM), Program Trace Macrocell (PTM)
  • Support for Embedded Trace Buffer (ETB), Trace Memory Controller (TMC), Trace Port Interface Unit (TPIU)
  • Support for multiple trace sources in a single stream (CoreSight trace)


Details and Configurations

Copyright © 2016 Lauterbach GmbH, Altlaufstr.40, D-85635 Höhenkirchen-Siegertsbrunn, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice. Report Errors
Last generated/modified: 4-Apr-2016