XScale Debugger The embedded tools company


XScale Debugger

80200 80219 80321 80331 80332 80333 81341 81342 81348 IOP321 IOP331 IOP332 IOP333 IOP341 IOP342 IOP348 IXC1100 IXP2325 IXP2350 IXP2400 IXP2800 IXP2805 IXP2850 IXP2855 IXP420 IXP421 IXP422 IXP423 IXP425 IXP430 IXP431 IXP432 IXP433 IXP435 IXP455 IXP460 IXP465 PXA210 PXA250 PXA255 PXA260 PXA261 PXA262 PXA263 PXA270 PXA271 PXA272 PXA273 PXA290 PXA300 PXA301 PXA302 PXA310 PXA311 PXA312 PXA320 PXA800EF PXA800F PXA901
Picture
  Highlights
Support for a wide range of on-chip debug interfaces
Easy high-level and assembler debugging
Interface to all compilers
RTOS awareness
Display of internal and external peripherals at a logical level
Flash programming
Powerful script language
Hardware breakpoints and trigger (if supported by on chip debug interface)
Multiprocessor debugging
Software compatible to all TRACE32 tools
Active Debugger controlled by PowerPC
USB Option
Branch Trace Support
 
  Introduction
The XScale debugger is the fasted system available now for debugging high-speed ARM devices. Connected to Ethernet and using the fasted FPGA technology together with a 260 MIPS controller, the customer can download programs at least 100 times faster than on simple passive JTAG interfaces.


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Demo Software for Download






TOP       Function

PODBUS Interface to PC, ETHERNET or TRACE32-ICE

High-Speed Download


Variable Debug Clock Speed

  • Variable up to 100 MHz

Trigger

  • Input from PODBUS
  • Output to PODBUS

Support for EPROM/FLASH Simulator

  • Breakpoints in ROM Area
  • 8, 16 and 32 Bit EPROM/FLASH Emulation
TOP       Adaption

Adaption for ARM and XSCALE

Half-Size Adapters for Debuggers
  • 100 mil to 50 mil Adapters
  • Small Footprint for Target Connector

TOP       IDE - Integrated Development Environment

ASM Debugger
  • Supports almost all file formats
  • Assembler source-level debugging
  • Advanced memory display
  • Inline assembler
  • Memory tests
  • Customizable windows
  • Peripheral windows
  • Terminal window
  • Semi-hosting
  • Flash programming
  • Full support for peripherals
High-Level-Language Debugging
  • Supports multiple languages
  • Full support for C++
  • Integrated into TRACE32 environment
  • Supports most compilers and hosts
  • Same user interface on different hosts
  • High speed download
  • Debugs optimized code
  • Display of function nesting
  • Display of linked lists
  • Powerful expression evaluation
Compiler Support

C

  • ARMCC (ARM)
    • AIF
    • ELF/DWARF
  • REALVIEW MDK (ARM/Keil)
    • ELF/DWARF2
  • GCCARM (FSF)
    • COFF/STABS
    • ELF/DWARF2
  • GREENHILLS C (Greenhills)
    • ELF/DWARF2
  • ICCARM (IAR)
    • ELF/DWARF2
  • ICCV7-ARM (Imagecraft)
    • ELF/DWARF
  • CARM (Keil)
    • ELF/DWARF
  • HIGH-C (Metaware)
    • ELF/DWARF
  • TI-C (Texas Instruments)
    • COFF
  • GNU-C (Wind River Systems)
    • COFF

C++

  • ARM SDT 2.50 (ARM)
    • ELF/DWARF2
  • REALVIEW MDK (ARM/Keil)
    • ELF/DWARF2
  • GCCARM (FSF)
    • COFF/STABS
  • GNU (FSF)
    • EXE/STABS
  • GCCARM (FSF)
    • ELF/DWARF2
  • GREENHILLS C++ (Greenhills)
    • ELF/DWARF2
  • HIGH-C++ (Metaware)
    • ELF/DWARF
  • MSVC (Microsoft)
    • EXE/CV5

C/C++

  • VX-ARM (TASKING)
    • ELF/DWARF2
Multicore Debugging
  • Debugging support for homogeneous and heterogeneous multiprocessor and multicore systems
  • High quality standard debuggers can be combined for multiprocessor and multicore systems
  • All TRACE32-ICD debuggers are designed to work together in a multiprocessor/multicore debugging environment
  • Fast integration of third party debuggers
  • Several processors in a single piece of silicon can share the same debug port
  • Start and stop synchronisation
Logical Display of Periperals
  • Display of onchip peripherals
  • User definable windows
  • Interactive window definition with softkey support
  • Pulldown menues for selection of choices
  • Additional description for each field
Full MMU Support
  • Full integrated support of processor's MMU
  • Display of processor MMU registers
  • Display of MMU table entries
  • Display of address translation table
  • 'Shadowing' MMU address translation inside debugger
  • Full virtual and physical access to target at any time
  • Debugger has optionally write access to write protected memory areas
  • Detection and decoding of software MMU tables built by operating systems
  • Support for several user space MMU tables side by side
  • TLB context tracking and git statistics via CTS
Script Language PRACTICE
  • Structured Language
  • Menu Support
  • Command Logs
  • Custom Menues
  • Custom Toolbars and Buttons
  • Custom Dialog Windows
  • 64-Bit Arithmetic
  • Numeric, Logical and String Operators
  • Direct Access to System States
NOR FLASH Programming
  • Internal and/or external NOR FLASH memories
  • All common NOR FLASH types
  • Programming of multiple NOR FLASH devices
  • Provided by debuggers and in-circuit emulators
NAND FLASH Programming
  • Generic and CPU-specific NAND FLASH controllers
  • Support all common NAND FLASH devices
  • Bad block treatment (skipped, reserved block area)
  • ECC generation
SIM Instruction Set Simulators
  • Easy high-level and assembler debugging
  • Interface to all compilers
  • Trace Buffer
  • Powerful script language
  • Software compatible to all TRACE32 tools
  • Hardware simulation
Trace-based Profiling
  • Detailed analysis of function run-times
  • Detailed analysis of task run-times and state
  • Graphical analysis of variable values over the time
  • Analysis of the time interval of a single event (e.g. Interrupt)
  • Analysis of the time interval between 2 defined events
Trace-based Code Coverage
  • Long-Time Hardware Coverage Analysis for Emulator and ETM
  • Trace Based Coverage Analysis for ICD and Emulator
  • Analysis on ASM and HLL
  • Coverage summary on modul/function level
Sample-based Profiling
  • Long-time performance analysis for functions
  • Long-time performance analysis for tasks
  • Long-time analysis of the contents of a variable or memory location and more
Logger
  • Software trace of any size stored in an array structure on the target
  • General trace format provided by TRACE32-PowerView
  • Configuration and display commands provided by TRACE32-PowerView
  • Works as trace with address and data information
  • Works as a program flow trace (SH4, PowerPC)
  • Time stamp possible
  • Predefined algorithms to fill the trace provided by Lauterbach
  • User defined algorithms to fill the trace also possible
Snooper
  • Samples memory while application is running
  • Support for special debug communication channels
  • All trace display and analysis functions can be used
  • Trigger on specific values
  • Dynamic performance analysis
RTOS
RTOS Support
3rd Party Integration
3rd Party Tool Integration
Help System
  • Acrobat Based Documentation
  • Fast Text Search
  • Device Specific Filtering
  • Basic and Advanced Help
  • Training Manuals Included
  • WWW Update
TOP       Onchip Trace


    Branch Trace Support
TOP       Trace Extension

PowerIntegrator - Logic and Bus Analyzer
  • Timing Analyzer with 500 MHz on all Channels
  • State Analyzer up to 200 MHz DDR
  • 204 Input Channels
  • Transient Recording
  • Time Correlation with other Tracetools
  • Clock Qualifier for State Clock
  • Mixed State and Timing Mode
  • 4 Clock Inputs
  • MICTOR and Standard Probes (single ended)
  • MICTOR differential Probes
  • Analog Voltage and Current Probe
  • 3G/DigRF Protocol Support

TOP       Details and Configurations

80200
80219
80321
80331
80332
80333
81341
81342
81348
IOP321
IOP331
IOP332
IOP333
IOP341
IOP342
IOP348
IXC1100
IXP2325
IXP2350
IXP2400
IXP2800
IXP2805
IXP2850
IXP2855
IXP420
IXP421
IXP422
IXP423
IXP425
IXP430
IXP431
IXP432
IXP433
IXP435
IXP455
IXP460
IXP465
PXA210
PXA250
PXA255
PXA260
PXA261
PXA262
PXA263
PXA270
PXA271
PXA272
PXA273
PXA290
PXA300
PXA301
PXA302
PXA310
PXA311
PXA312
PXA320
PXA800EF
PXA800F
PXA901




Copyright © 2010 Lauterbach GmbH, Altlaufstr.40, D-85635 Höhenkirchen-Siegertsbrunn, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice.
Last generated/modified: Mar-10-2010