Integration for Simulink®


The embedded tools company
Processor-In-the-Loop Simulation
PIL Testing with TRACE32
Debugging within Simulink
Article


Picture
  Highlights
JTAG-based Processor-In-the-Loop (PIL) testing for Simulink
For autogenerated and hand-written code
Plug and play target support
Hardware-based and virtual testing
Free choice of build toolchain


Order
Order
Information
Support
Technical Support



TOP

Processor-In-the-Loop Simulation


    

PIL combines two important concepts of model-based design:

  • Verifiable models reflecting the fundamental requirements of the system
  • Back-to-back test of software and model

PIL is a powerful tool used for the early detection of errors and design flaws during unit testing. Using PIL the software unit can be verified in the test environment which corresponds as closely as possible to the production target environment. The test cases from model level verification can be fully reused ensuring functional equivalence of model and object code.

During PIL simulation the model communicates with the object code on the target. For each new test case the parameters and internal states are initialized on the target. For each simulation step the inputs and outputs of the algorithm are updated and transferred between the two environments. The verification using PIL can be carried out on different types of platforms:

  • Production hardware
  • Evaluation boards
  • Virtual targets
  • Core or instruction set simulators

In comparison with software-in-the-loop testing on a host computer the confidence in the validity of the test results increases significantly when PIL is successfully applied. The resulting test approach is fully compliant with the requirements of ISO 26262-6 (9.4.6).

TOP

PIL Testing with TRACE32


    

TRACE32 PIL is a fully integrated plugin for Simulink that implements a customizable workflow to streamline the setup of PIL tests. Due to its close coupling with TRACE32 it supports a multitude of different target platforms. In addition, the full feature set of TRACE32 becomes available during model-based testing. TRACE32 PIL can be seamlessly integrated into existing toolchains.

The key benefits are:

  • Plug and play target support
  • Autogenerated and hand-written code supported
  • Built-in support for various build toolchains
  • IEC 61508 compliant unit testing
  • On-the-fly debugging

Tested for use with MATLAB R2010b and newer.

Hardware-based Verification

TRACE32 provides debug support for more than 80 microprocessor architectures including:

  • TriCore
  • Power Architecture
  • RH850
  • ARM

Combining uniform base modules with architecture-specific probes helps to protect the long-term investment in the toolchain and simplifies the portability between different target environments.

During PIL testing TRACE32 is used as an abstraction layer by the modeling environment providing unified access to the target and rendering any target-specific adaptions on both host- and target-side effectively obsolete. Any target featuring basic debug supported becomes an eligible platform for model-based testing. In addition, the full set of TRACE32′s advanced debug and trace features becomes available.

Test Virtualization

TRACE32 can be used as debug front-end for virtual prototypes, core simulators and target servers offering support for common virtualization interfaces and a familiar user experience via its uniform GUI.

Integrated instruction set simulators are available for a majority of the supported microprocessor architectures.

Unit Testing

Modern safety standards put great emphasis on thorough unit testing. Sole verification on a host computer is no suitable replacement for direct testing in the target environment. Shortcomings here can easily backfire and lead to an increase of the overall verification efforts and costs during the development process.

TRACE32 PIL is a flexible solution for unit testing that is compliant with the requirements of IEC 61508 and related standards (ISO 26262, DO-178C, EN 50128, …). Furthermore, its is compatible with widespread unit testing frameworks for Simulink:

  • EZTEST® - Test Driven Development with Simulink & Stateflow

Customizable Workflow

TRACE32 PIL offers a flexible workflow that relies only on basic blocks such as S-Function or Variant Subsystem. Moreover, the use of block libraries is fully supported. This concept maximizes the compatibility with different releases of MATLAB and code generators. The workflow is fully customizable via a graphical user or built-in command line interface.

To prepare a model for PIL testing, it is automatically supplemented by a dynamic interface for the communication with the target platform, the target code is built and loaded onto the target. TRACE32 users are free to use their code generator and cross compiler of choice.

Dynamic PIL Interface

    

Whereas similar solutions rely on premade hooks to create a suitable interface for PIL testing, TRACE32 PIL has developed a different approach. To be able to even support hand-written source code, the plugin features a parser for both model and source code interface. The workflow analyzes the interface, makes it configurable by the user, and creates it dynamically. Taking advantage of the capabilities of modern debug interfaces TRACE32 makes all model parameters tunable without the need to recompile the object code.

During the interface configuration the user is able to customize both the mapping of source code functions to model callbacks and variables. Subsequently, wrapper functions are derived from the mapping data to transform model callbacks into the associated function calls and parameter initializations. The strength of this approach is that the dependency on the code generation process is minimized. Supported code generators include:

TOP

Debugging within Simulink


    

The TRACE32 integration offers native debugging between Simulink models and TRACE32. Selecting an element of the model allows quick navigation to the associated source code section within TRACE32 and vice versa. Simulation runs at model level can be synchronized with the code exectution on the target by setting breakpoints.

TOP

Article


English Article "Design of a Flexible Integration Interface for PIL Tests"


German Article "Design einer flexiblen Integrationsschnittstelle für PIL-Tests"







Copyright © 2016 Lauterbach GmbH, Altlaufstr.40, D-85635 Höhenkirchen-Siegertsbrunn, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice. Report Errors
Last generated/modified: 12-Apr-2016