|
ハードウェアベースカバレッジ |
 エミュレータ
|
全てのエミュレータは、リード/ライトサイクルのためのフラグメモリを持っています。これは、コード/データカバレッジに使用されます。
|
HLL Level
|
Displays coverage state of each line:
Never: code line is not used yet
Partial: not all branches executed
Ok: All branches (if exist) executed
|
Coverage Summary
|
Coverage status of each function
Percentage covered of each function
Number of taken/not taken branches inside each function
|
|
Trace Based Coverage |
Coverage data can be generated from bus trace, flow trace or by CTS data.
Coverage data can be stored and reloaded and accumulated by new trace information.
|
Hardware Based Coverage |
While trace-based code coverage is restricted by the size of the trace and
can therefore only be implemented for a short monitoring period,
hardware-based code coverage can also be used in long-duration tests over
large program areas. Hardware-based code coverage is currently possible
for all processors with ARM-ETM (ARM7/9-based cores), for the SH4 from
Renesas and the ST40 from STMicroelectronics and for all in-circuit emulators.
Emulators
|
All emulators have special flag memories for read and write cycles, which can
be used for analysing code and data coverage.
|
PowerTrace
|
As a basic requirement it must be possible to configure the processor in
such a way that the trace information about the program flow at the run
time contains the branch destinations of both the direct and indirect
branches. Since the branch destination information is usually coded and
is not available until after a time lag the trace information is further
processed by an FPGA in order to be able to set the markings for the individual
instructions for the program run time.
What is the maximum number of instructions that can be monitored?
The PowerTrace provides storage space for 4 x 2 million instructions.
This memory must be mapped explicitly. The maximum physical address range
for which a hardware-based code coverage can be implemented depends
essentially on the minimum width of an individual instruction.
With an instruction width of 32 bits, for example, 4 x 8 Mbytes can be analyzed.
|
|
ハードウェアベースカバレッジ
