Adaptation for ARC


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Debugger Adaption for ARC
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Debugger Adaption for ARC


Pinout

ARM compatible 20-pin IDC connector with pins on 0.100" centers
Signal

Pin

 Pin

Signal

    
VTREF12VSUPPLY (not used)
TRST- (optional)34GND
TDI56GND
TMS|TMSC78GND
TCK|TCKC910GND
RTCK (optional)1112GND
TDO1314GND
SRST- (optional)1516GND
(leave open)1718GND
(leave open)1920GND
    
Pin Direction Description
TCK|TCKC to CPU JTAG Clock. It is recommended to put a pull-down to GND on this signal.
TMS to CPU Standard JTAG TMS: It is recommended to put a pull-up to VTREF on this signal for standard 4-pin JTAG.
TMSC to/from CPU Compact JTAG TMSC: Your chip should have a bus-hold on this line for compact JTAG.
TDI to CPU JTAG TDI. It is recommended to put a pull-up to VTREF on this signal.
Only required for standard 4-pin JTAG / Optional signal for compact JTAG.
TDO from CPU JTAG TDO. (No pull-up or pull-down is required.)
Only required for standard 4-pin JTAG / Optional signal for compact JTAG.
TRST- to CPU JTAG Testport Reset. (Optional, No pull-up or pull-down is required.)
RTCK
from CPU
JTAG Return Clock. (Optional, No pull-up or pull-down is required.)
VTREF from CPU Reference voltage. This voltage should indicate the nominal HIGH level for the JTAG and trace pins. So for example, if your signals have a voltage swing from 0 V ... 3.3 V, the VTREF pin should be connected to 3.3 V.
SRST- to/from CPU System Reset Signal. (Optional)
If your target board has a low active CPU reset signal, you can connect this low active reset signal to this pin. This enables the debugger to detect a CPU reset. Furthermore the debugger can drive this pin to GND to hold the CPU in the reset state. The debugger drives this pin as open-drain, so a pull-up is mandatory.

Dimension

Connector Type

  • This is a standard 20 pin double row (two rows of 10 pins) connector (pin to pin spacing: 2.54mm/0.100").
  • If terminal strip without shroud is used, the spacing marked with "A" must be a minimum of 30.6mm/1.2".
 
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Copyright © 2017 Lauterbach GmbH, Altlaufstr.40, D-85635 Höhenkirchen-Siegertsbrunn, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice. Report Errors
Last generated/modified: 23-Aug-2017