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Debugger Adaption for ARC |
ARM compatible 20-pin IDC connector with pins on 0.100" centers
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Signal
| Pin
| | Pin
| Signal
|
|---|
| | |  | | |
| VTREF | 1 |  | 2 | VSUPPLY (not used) |
| TRST- (optional) | 3 | | 4 | GND |
| TDI | 5 | | 6 | GND |
| TMS | 7 | | 8 | GND |
| TCK | 9 | | 10 | GND |
| RTCK (optional) | 11 | | 12 | GND |
| TDO | 13 | | 14 | GND |
| SRST- (optional) | 15 | | 16 | GND |
| (leave open) | 17 | | 18 | GND |
| (leave open) | 19 | | 20 | GND |
| | |  | | |
| TCK |
Jtag Clock. It is recommended to put a pull-down to GND on this signal. |
| TMS |
Jtag TMS. It is recommended to put a pull-up to VCC on this signal. |
| TDI |
Jtag TDI. It is recommended to put a pull-up to VCC on this signal. |
| TDO |
Jtag TDO. (No pull-up or pull-down is required.) |
| TRST- |
Jtag Testport Reset. (Optional, No pull-up or pull-down is required.) |
| RTCK |
Jtag Return Clock. (Optional, No pull-up or pull-down is required.) |
| VTREF |
Reference voltage. This voltage should indicate the
nominal HIGH level for the JTAG and trace pins.
So for example, if your signals have a voltage swing
from 0 V ... 3.3 V, the VTREF pin should be connected to 3.3 V.
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| SRST- |
System Reset Signal. (Optional)
If your board has a low active CPU reset signal, you can
connect this low active reset signal to this pin.
This enables the debugger to detect a CPU reset.
Furthermore the debugger can drive this pin to GND to hold the CPU in
the reset state. The debugger drives this pin as open-drain,
so a pull-up is mandatory.
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 Dimension
Connector Type
- This is a standard 20 pin double row (two rows of 10 pins) connector (pin to pin spacing: 2.54mm/0.100").
- If terminal strip without shroud is used, the spacing marked with "A" must be a minimum of 30.6mm/1.2".
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Special Debugger Adaption for ARCangel |
This special debug cable for the ARCangel evaluation platforms is in preparation. 
The ARCangel evaluation platforms comes with a female 15-pin SUB-D connector:
| TCK |
Jtag Clock. It is recommended to put a pull-down to GND on this signal. |
| TMS |
Jtag TMS. It is recommended to put a pull-up to VCC on this signal. |
| TDI |
Jtag TDI. It is recommended to put a pull-up to VCC on this signal. |
| TDO |
Jtag TDO. (No pull-up or pull-down is required.) |
PDATA, PCLK, PSS0,
PSS1, PCNT, PDONE |
ARCangel control signals. Used for programming and resetting the core. |
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Half-Size Adapters |
- 100 mil to 50 mil Adapters
- Small Footprint for Target Connector
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Half-Size Adapters for Debuggers
Debugger Adaption for ARC