Adaption JTAG Debugger for QorIQ 32/64 Bit (ICD)


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Debugger Connector


Target Adaption for JTAG Debugger for QorIQ 32/64 Bit (ICD)

Connector 16 pin


Signal

Pin

 Pin

Signal

    
TDO12N/C
TDI34TRST-
(RUNSTOP-)56JTAG-VREF
TCK78(CHKSTPIN-)
TMS910N/C
(SRESET-)1112GND
PORESET-1314N/C (KEY PIN)
(CKSTOPOUT-)1516GND
    

  • Signals in brackets are not necessary for debugging, but it is recommended to connect those signals if available.
  • Pin 8 will be permanently driven to VCC level by the debugger.
  • Signals which are not available should be left unconnected on the debug connector.
  • Pin 6 (JTAG-VREF) must match the JTAG I/O voltage of the processor. JTAG-VREF should have a resistance less than 5kOhm for 3.0~5.0V, less than 2kOhm for 1.8~3.0V.

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Target Connector


Dimension

Connector Type

  • This is a standard 16 pin double row (two rows of 8 pins) connector (pin to pin spacing: 2.54mm/0.100").
  • If terminal strip without shroud is used, the spacing marked with "A" must be a minimum of 25.5mm/1".
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Half-Size Adapters


Half-Size Adapters for Debuggers



  • 100 mil to 50 mil Adapters
  • Small Footprint for Target Connector






Copyright © 2016 Lauterbach GmbH, Altlaufstr.40, D-85635 Höhenkirchen-Siegertsbrunn, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice. Report Errors
Last generated/modified: 1-Aug-2016