Proprietary UltraSoC Trace Solution for RISC-V


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Trace Protocol
Pure UltraSoC Trace Infrastructure
RISC-V with UltraSoC Trace Components in an Arm CoreSight Trace Infrastructure
Generic Trace Features


UltraSoC RISC-V Trace
  Highlights
Based on the proprietary trace message format of the UltraSoC Trace Encoder
Instruction trace
Trace protocol may include timestamps
Multicore tracing
Trace filters allow to reduce the generation of trace messages
Support for UltraSoC-only trace infrastructure and UltraSoC trace IP integrated into an Arm CoreSight trace infrastructure




 

Trace Protocol


The UltraSoC Trace Encoder generates instruction execution details based on an UltraSoC proprietary trace protocol.
 

Pure UltraSoC Trace Infrastructure


The UltraSoC trace infrastructure IP can be integrated into any RISC-V based chip.


Support

TRACE32 Trace Tools

USB Protocol
  • TRACE32 RISC-V FrontEnd (floating license)
  • TRACE32 RISC-V UltraSoC Debug BackEnd (floating license)
  • TRACE32 MultiCore License (floating license)
  • TRACE32 RISC-V Trace License (floating license)
 

RISC-V with UltraSoC Trace Components in an Arm CoreSight Trace Infrastructure


The UltraSoC trace infrastructure IP can be integrated into the CoreSight trace infrastructure.


Support

TRACE32 Trace Tools

Onchip Trace (ETB/ETF) Off-chip Trace Port (TPIU)

Adaptation for CoreSight HSSTP

 

Generic Trace Features


Trace-based Debugging (CTS)
  • Allows re-debuggging of a traced program section
  • Provides forward and backward debugging capabilities
  • High-level language trace display including all local variables
  • Timing and function nesting display
  • Has the ability to fill most trace gaps caused by the limited bandwidth of trace port

Trace-based Profiling
  • Detailed analysis of function run-times
  • Detailed analysis of task run-times and state
  • Graphical analysis of variable values over the time
  • Analysis of the time interval of a single event (e.g. Interrupt)
  • Analysis of the time interval between 2 defined events

Trace-based Code Coverage
  • Real-time code coverage without instrumentation
  • Suitable for long-term testing
  • Support for all common code coverage metrics
  • Automated report generation
  • Full support of multicore chips





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Last generated/modified: 14-Sep-2020