TRACE32® QuadProbe for Intel® Processors

Tool Configuration

Adaptation

TRACE32 Debug Features

Details and Configurations

Highlights

	QuadProbe MIPI60-Q provides debug capability for up to 4 debug connectors on a single target
	Support for standard JTAG, debug HOOKs and I2C bus
	Support for merged debug ports (two JTAG chains per debug connector)
	Support for survivability features (threshold, slew rate, and more)
	Voltage range 1.0 V to 1.8 V

	SMP debugging for multi-socket targets
	SMP debugging of hundreds of threads
	AMP debugging with other architectures
	BIOS/UEFI debugging with tailor-made GUI for all UEFI phases
	Linux- and Windows-aware debugging
	Hypervisor debugging

							Technical Support
List of Supported Compilers List of Supported Target Operating Systems List of Supported UEFIs List of Supported Hypervisors

Tool Configuration

Configuration of QuadProbe for Intel Processors

Configuration on the left side: standard configuration of TRACE32® QuadProbe.
Configuration in the middle: standard configuration with trace capability for Intel® Processor Trace data conveyed off-chip.
Configuration on the right side: configuration for four debug connectors.

Adaptation

Adaptation for QuadProbe

TRACE32 Debug Features

Debugger for All Cores of a Multicore Chip / Multisocket Chip

Debugger for all cores of a multicore chip
Debugging of application cores, DSPs, accelerator cores and special-purpose cores
Debugging of more than 80 core architectures
Support for every multicore topology
Support for all multicore operation modes
Support for AMP and SMP systems
Single debug hardware can be licensed for all cores of a multicore chip

Debug Support for Unified EFI Bootloader

Support by a loadable extension
Debug support for all UEFI phases
Tailor-made display windows for each UEFI phase
Continuous solution without "debug gap"
Debugging from reset vector
Debugging of dynamically loaded drivers from their entry point

OS-aware Debugging

Real-time, non-intrusive display of RTOS system resources
Task stack coverage
Task related breakpoints
Task context display
SMP support
Task related performance measurement
Statistic evaluation and graphic display of task run times
Task related evaluation of function run times
PRACTICE functions for OS data
Easy access via RTOS specific pull-down menus
Support for all major RTOSes

Script Language PRACTICE

Structured Language
Menu Support
Command Logs
Custom Menues
Custom Toolbars and Buttons
Custom Dialog Windows
64-Bit Arithmetic
Numeric, Logical and String Operators
Direct Access to System States

Details and Configurations

Intel and the Intel logo are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries.

Copyright © 2021 Lauterbach GmbH, Altlaufstr.40, 85635 Höhenkirchen-Siegertsbrunn, Germany Impressum Privacy Policy
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice. Report Errors
Last generated/modified: 07-Jun-2021