PowerTrace for NEXUS
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NEXUS Debugger and Trace for microcontrollers with IEEE5001 Interface
  Highlights
Support for NEXUS standard class 1 to 3+
Programming support for on-chip and external flashes
Real-time access to memory
Hardware breakpoints and trigger
Program and data flow trace up to 400 MHz
Up to 4 GByte trace memory
Upload to host within 10 seconds typically
Selective data flow trace for 2 address ranges
Trigger on instruction execution or data access
Statistic functions/Performance analysis
Code coverage
External trigger input and output
USB and ETHERNET interface included
Support for *cpu-7781.txt, *cpu-7600.txt
 
  Introduction
The Lauterbach product TRACE32-PowerTrace/NEXUS supports the NEXUS standard class 1 to 3. The hardware module for the NEXUS debugger is universal and allows to interface different target processors by simply changing the NEXUS adapter and starting a new software.


Link Volt
Operation Voltage		 FAQ
Frequently Asked Questions		 Support
Technical Support
[www.nexus5001.org]  Nexus Organisation



 
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Nexus Concept



The PowerNexus Module includes all systems for trace and debugging. Controlled by an PowerPC controller with 200 MHz it gives max. performance for fast download and trace upload.

Other WWW Sites

• AVR32 NEXUS Debugger and Trace
• MAC71xx/72xx NEXUS Debugger and Trace
• MPC55xx/MPC56xx NEXUS Debugger and Trace
• MPC56x NEXUS Debugger and Trace
 
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Controller

CPU

  • 200 MHz PowerPC
  • 250 Drystone 2.1 MIPS
  • 64 MByte SDRAM

PODBUS Interface to PC, TRACE32-ICE or TRACE32-FIRE

Direct USB Interface

  • USB-1 12 MBit/sec
  • USB-2 480 MBit/sec

Direct FastEthernet Interface

  • 10/100 MBit/sec
  • Upload of full trace (256 MByte) within 10 seconds
 
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Active Debugger

Debuggers available

  • PowerPC
  • M-Core
  • C166
  • TriCore
  • Super10

Support of combined operation

  • NEXUS
  • BDM
  • JTAG
  • OCDS
  • ONCE

Software Compatible to In-Circuit Emulator

  • Operation System
  • PRACTICE
  • ASM Debugger
  • HLL Debugger for C,C++, ADA, PASCAL
  • Peripheral Windows

High-Speed Download

  • Up to 800 KByte/sec

Variable Debug Clock Speed

  • 10 kHz...5 MHz
  • 1/4 CPU Clock
  • 1/8 CPU Clock
  • Variable up to 100 MHz
 
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Nexus Trace

Nexus Port

  • Max. 92 Trace Channels for 200 MHz Operation
  • High effective trace rate by self calibration

Supported Adapters



Trace Storage

  • 256/512/1024/2048/4096 MByte Trace Storage
  • 16/32/64/128/256 MFrames
  • Full Dual-ported
  • 640 MByte/sec sample rate
  • Time Stamp 5/20 ns Resolution
  • Time Correlation and Tracking with other TRACE32 Tools

Code Coverage

  • Hardware Code Coverage
  • 4 Segments with 4 MByte each

Data Coverage

  • Hardware Data Coverage
  • 4 Segments with 256 KByte each

Shadow Memory

  • 4 Segments with 256 KByte each

Breakpoints

  • 4 Breakpoint Memories with 256 KBit each

Trigger Sequencer

  • 4 Trigger Levels
    • Goto
    • Continue
  • Trace Control
    • Enable
    • On
    • Off
    • Break
  • 3 Counters
    • Enable
    • On
    • Off
    • Restart
  • 2 Flags
    • On
    • Off
    • Toggle
  • 2 Markers
  • Break
    • Program
    • Trigger Bus
  • 2 Trigger Outputs

Trigger Delay

  • 0 .. 300 s

External Trigger

  • Input from PODBUS
  • Output to PODBUS

Performance Analyzer

Support for EPROM/FLASH Simulator

  • Breakpoints in ROM Area
  • 8, 16 and 32 Bit EPROM/FLASH Emulation
 
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Supported Processor Lines

Supported CPUs Other WWW Sites

AVR32 NEXUS Debugger and Trace MAC71xx/72xx NEXUS Debugger and Trace MPC55xx/MPC56xx NEXUS Debugger and Trace MPC56x NEXUS Debugger and Trace
 
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Software Debugger



ASM Debugger
  • Supports almost all file formats
  • Assembler source-level debugging
  • Advanced memory display
  • Inline assembler
  • Memory tests
  • Customizable windows
  • Peripheral windows
  • Terminal window
  • Semi-hosting
  • Flash programming
  • Full support for peripherals
High-Level-Language Debugging
  • Supports multiple languages
  • Full support for C++
  • Integrated into TRACE32 environment
  • Supports most compilers and hosts
  • Same user interface on different hosts
  • High speed download
  • Debugs optimized code
  • Display of function nesting
  • Display of linked lists
  • Powerful expression evaluation
Supported Compilers
Support of Download Formats for PowerPC

ADA

  • GNAT PRO (ADACORE)
  • ELF/DWARF
  • GNAT (FSF)
  • ELF/DWARF

C

  • CXPPC (COSMIC)
  • ELF/DWARF
  • XCC-V (GAIO)
  • SAUF
  • GREEN-HILLS-C (GREENHILLS)
  • ELF/DWARF
  • MCCPPC (MENTOR)
  • ELF/DWARF
  • CC (NXP)
  • XCOFF
  • ULTRA-C (RADISYS)
  • ROF
  • HIGH-C (SYNOPSYS)
  • ELF/DWARF
  • DCPPC (TASKING)
  • ELF/DWARF
  • D-CC (WINDRIVER)
  • IEEE
  • COFF
  • ELF/DWARF

C++

  • GCC (FSF)
  • ELF/DWARF
  • GREEN-HILLS-C++ (GREENHILLS)
  • ELF/DWARF
  • CCCPPC (MENTOR)
  • ELF/DWARF
  • MSVC (MICROSOFT)
  • EXE/CV5
  • HIGH-C++ (SYNOPSYS)
  • ELF/DWARF
  • D-C++ (WINDRIVER)
  • ELF/DWARF
  • GCCPPC (WINDRIVER)
  • ELF/STABS

C/C++

  • GNAT PRO (ADACORE)
  • ELF/DWARF
  • GCC (HIGHTEC)
  • ELF/DWARF
  • CODEWARRIOR (NXP)
  • ELF/DWARF

GCC

  • GCC (FSF)
  • ELF/DWARF

JAVA

  • FASTJ (WINDRIVER)
  • ELF/DWARF
Supported Compilers
Support of Download Formats for C166/Super10

C

  • XC16X/ST10 (COSMIC)
  • ELF/DWARF
  • GNU-GCC166 (HIGHTEC)
  • DBX
  • C166 (KEIL)
  • EOMF-166
  • C166 (TASKING)
  • IEEE

C++

  • GNU-CPP166 (HIGHTEC)
  • DBX
  • CP166 (TASKING)
  • IEEE
Supported Compilers
Support of Download Formats for TriCore

C/C++

  • GREENHILLS (GREENHILLS)
  • ELF/DWARF2
  • GCC (HIGHTEC)
  • ELF/DWARF2
  • VX-TC (TASKING)
  • ELF/DWARF2
  • IEEE
  • DIAB (WINDRIVER)
  • ELF
Supported Compilers
Support of Download Formats for ARM

ADA

  • GNAT PRO (ADACORE)
  • ELF/DWARF

C

  • ARMCC (ARM)
  • AIF
  • ELF/DWARF
  • REALVIEW-MDK (ARM)
  • ELF/DWARF2
  • GCCARM (FSF)
  • COFF/STABS
  • ELF/DWARF2
  • GREENHILLS-C (GREENHILLS)
  • ELF/DWARF2
  • ICCARM (IAR)
  • ELF/DWARF2
  • ICCV7-ARM (IMAGECRAFT)
  • ELF/DWARF
  • CARM (KEIL)
  • ELF/DWARF
  • HIGH-C (SYNOPSYS)
  • ELF/DWARF
  • TI-C (TI)
  • COFF
  • GNU-C (WINDRIVER)
  • COFF
  • D-CC (WINDRIVER)
  • ELF

C++

  • ARM-SDT-2.50 (ARM)
  • ELF/DWARF2
  • REALVIEW-MDK (ARM)
  • ELF/DWARF2
  • GCCARM (FSF)
  • COFF/STABS
  • GNU (FSF)
  • EXE/STABS
  • GCCARM (FSF)
  • ELF/DWARF2
  • GREENHILLS-C++ (GREENHILLS)
  • ELF/DWARF2
  • MSVC (MICROSOFT)
  • EXE/CV5
  • HIGH-C++ (SYNOPSYS)
  • ELF/DWARF

C/C++

  • GNAT PRO (ADACORE)
  • ELF/DWARF
  • XCODE (APPLE)
  • Mach-O
  • GCC (HIGHTEC)
  • ELF/DWARF
  • SOMNIUM DRT (SOMNIUM)
  • ELF/DWARF
  • VX-ARM (TASKING)
  • ELF/DWARF2
Memory Analysis
  • Display of allocated memory blocks
  • Memory allocation Statistics
  • Check for out-of-bounds writes
  • Trace of allocation calls
  • Graphical displays of memory usage
Intelligent Loader
  • Up to 30 times faster download speed
  • Differential loader especially designed to speed-up iterative edit/compile/load cycles
  • Zipped download for large files
  • Memory contents are verified by checksum instead of reading memory
Multicore Debugging
  • Debugger for all cores of a multicore chip
  • Debugging of application cores, DSPs, accelerator cores and special-purpose cores
  • Debugging of more than 80 core architectures
  • Support for every multicore topology
  • Support for all multicore operation modes
  • Support for AMP and SMP systems
  • Single debug hardware can be licensed for all cores of a multicore chip
Logical Display of Peripherals
  • Display of onchip peripherals
  • User definable windows
  • Interactive window definition with softkey support
  • Pulldown menues for selection of choices
  • Additional description for each field
Script Language PRACTICE
  • Structured Language
  • Menu Support
  • Command Logs
  • Custom Menues
  • Custom Toolbars and Buttons
  • Custom Dialog Windows
  • 64-Bit Arithmetic
  • Numeric, Logical and String Operators
  • Direct Access to System States
NOR FLASH Programming
  • Internal and/or external NOR FLASH memories
  • All common NOR FLASH types
  • Programming of multiple NOR FLASH devices
  • Provided by debuggers and in-circuit emulators
TRACE32 Instruction Set Simulators
  • Integral part of TRACE32
  • Configurable as system under debug (PBI=SIM)
  • Allows post-mortem debugging
  • Software compatible to all TRACE32 tools
  • Easy high-level and assembler debugging
  • OS-aware debugging
  • Cache simulation (architecture dependent)
  • Program and data flow trace based on a bus trace protocol
  • Advanced trace analysis features
  • Powerful script language
  • Programming interface for peripheral simulation
  • Not available for the MIPS architecture
  • Not available for processor architectures that support user-defined instructions
Trace-based Profiling
  • Detailed analysis of function run-times
  • Detailed analysis of task run-times and state
  • Graphical analysis of variable values over the time
  • Analysis of the time interval of a single event (e.g. Interrupt)
  • Analysis of the time interval between 2 defined events
Sample-based Profiling
  • Long-time performance analysis for functions
  • Long-time performance analysis for tasks
  • Long-time analysis of the contents of a variable or memory location and more
Trace-based Code Coverage
SmartTrace
  • Fills in missing code
  • Direct branch reconstruction
  • Indirect branch reconstuction with CTS
  • Memory and Register values from CTS
Trace-based Debugging (CTS)
  • Allows re-debuggging of a traced program section
  • Provides forward and backward debugging capabilities
  • High-level language trace display including all local variables
  • Timing and function nesting display
  • Has the ability to fill most trace gaps caused by the limited bandwidth of trace port
Logger
  • Software trace of any size stored in an array structure on the target
  • General trace format provided by TRACE32-PowerView
  • Configuration and display commands provided by TRACE32-PowerView
  • Works as trace with address and data information
  • Works as a program flow trace (SH4, PowerPC)
  • Time stamp possible
  • Predefined algorithms to fill the trace provided by Lauterbach
  • User defined algorithms to fill the trace also possible
Snooper
  • Samples memory while application is running
  • Support for special debug communication channels
  • All trace display and analysis functions can be used
  • Trigger on specific values
  • Dynamic performance analysis
OS-aware Debugging
  • Real-time, non-intrusive display of RTOS system resources
  • Task stack coverage
  • Task related breakpoints
  • Task context display
  • SMP support
  • Task related performance measurement
  • Statistic evaluation and graphic display of task run times
  • Task related evaluation of function run times
  • PRACTICE functions for OS data
  • Easy access via RTOS specific pull-down menus
  • Support for all major RTOSes
3rd Party Tool Integration
  • Editor Integration
  • CASE Tool Integration
  • Kernel Integration
 
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Extensions

FLEX Adapter
  • Highly Flexible Adapters
  • For Debuggers and ICD Trace
  • High Signal Quality
  • Adapted Impedance
  • MICTOR
  • 100 MIL
  • SAMTEC
  • YAMAICHI

 
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Configuration Examples

 
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NEXUS Debugger and EPROM/FLASH Simulator on PC or Workstation

Hub 10-Base-T or 100-Base-T
NEXUS Debug Module
EPROM/FLASH Simulator Module
 
 
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NEXUS Debugger on PC with USB Interface

 
USB2
NEXUS Debug Module
with USB Interface
 
 
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NEXUS Debugger on PC with USB Interface

 
USB2
NEXUS Debug Module
with USB Interface
Mixed Operation JTAG/NEXUS
 
 
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NEXUS Debugger on PC with ETH Interface

 
Gigabit ETHERNET
PowerDebug II Module
with 1000 MBit ETH Interface
Trace Module
 
 
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NEXUS Debugger and EPROM/FLASH Simulator on PC with USB Interface

 
USB2
NEXUS Debug Module
with USB Interface
EPROM/FLASH Simulator Module
 
 
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NEXUS Debugger and Timing/State Analyzer on PC or Workstation

Hub 10-Base-T or 100-Base-T
NEXUS Debug Module
Extension Cable
State/Timing Analyzer
 
 
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NEXUS Debugger and Timing/State Analyzer on PC or Workstation

Hub 10-Base-T or 100-Base-T
NEXUS Debug Module
Timing Analyzer SOC (ASIC/FPGA)
 






Copyright © 2018 Lauterbach GmbH, Altlaufstr.40, D-85635 Höhenkirchen-Siegertsbrunn, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice. Report Errors
Last generated/modified: 18-May-2018