News - TRACE32 supports Lattice Mico32

The embedded tools company

Höhenkirchen-Siegertsbrunn, 02-Sep-2019

TRACE32 supports Lattice Mico32 synthesizable cores

Lauterbach, the world’s leading supplier of debug tools, announced support for the Lattice Mico32 family of 32-bit RISC based ‘soft’ microprocessor cores. The soft core is provided as an HDL description under an Open IP license and is highly customizable. The Lauterbach team wanted to squeeze out the best possible performance from the on-chip debug interface; something Lauterbach customers have come to expect.

The new variant of TRACE32 for Lattice Mico32 provides full support for all available on-chip debug features, giving users the ability to control program execution, manage breakpoints, access to memory and registers, and support for semi-hosting. Support is included for custom instructions, using existing technology derived from supporting other synthesizable cores, and for non-intrusive memory reads and writes. Debug events in the core trap into a monitor program which communicates with the debugger. TRACE32 supports the existing Lattice monitors and provides an alternative high-performance monitor, which can be customized upon request as user’s create ever more complex devices.

According to Stephan Lauterbach, General Manager, “A customizable processor allows developers to only include the modules they need for their system, making it more cost effective and secure. By adding support for the Lattice soft core to TRACE32, users can now take advantage of tried and tested world leading debug technology when developing their latest systems. This should give them a competitive advantage in getting their solutions developed faster and more robustly.” Support for Lattice Mico32 will be available in the next TRACE32 release, scheduled for September 2019.

Copyright © 2019 Lauterbach GmbH, Altlaufstr.40, 85635 Höhenkirchen-Siegertsbrunn, Germany   Impressum     Privacy Policy
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice. Report Errors
Last generated/modified: 02-Sep-2019