SH Trace


The embedded tools company


GENESIS-2 SH-MOBILE-R SH-MOBILE-R2 SH-MOBILE3

SH Trace
  Highlights
Up to 4 GByte trace memory
Up to 1 GRecords
200 MHz speed
Time stamp
Trace-based debugging
Performance analysis
Coverage analysis
Statistic functions
Graphical trace views
RTOS statistics
 
  Introduction
This high-speed trace module is designed for the trace port of the SH4 (AUD).


Freq
Max. Operation Frequency
Order
Product
Information
Support
Technical Support



 

Trace Modules


PowerTrace II
  • 1, 2 or 4 GByte trace memory
  • Universal trace module, connect to target via architecture-dependent trace probes (parallel or serial preprocessor)
  • Maximum bandwidth of 19,2 GBit/s
  • Fast trace upload to the host computer
  • Support for parallel trace ports with up to 32-bit at 300 MHz DDR
  • Support for serial trace ports, each lane max. 6.5 Gbit/s, but only up to 19,2 GBit/s in total
  • Support for TRACE32 Streaming up to 180 MByte/s, compression allows higher data rates to be achieved
  • PODBUS Express interface to PowerDebug PRO
  • PODBUS and PODBUS Express interfaces to Logic Analyzer modules, e.g. PowerProbe, PowerIntegrator
  • Additional independent 17 channel logic analyzer (with included Standard Probe)
  • Energy Profiling (with optional Analog Probe)

 

Support Software







Logger
  • Software trace of any size stored in an array structure on the target
  • General trace format provided by TRACE32-PowerView
  • Configuration and display commands provided by TRACE32-PowerView
  • Works as trace with address and data information
  • Works as a program flow trace (SH4, PowerPC)
  • Time stamp possible
  • Predefined algorithms to fill the trace provided by Lauterbach
  • User defined algorithms to fill the trace also possible

Trace-based Debugging (CTS)
  • Allows re-debuggging of a traced program section
  • Provides forward and backward debugging capabilities
  • High-level language trace display including all local variables
  • Timing and function nesting display
  • Has the ability to fill most trace gaps caused by the limited bandwidth of trace port

SmartTrace
  • Fills in missing code
  • Direct branch reconstruction
  • Indirect branch reconstuction with CTS
  • Memory and Register values from CTS

 

Compatible Debugger


SH Debugger
  • Interface to all compilers in C and C++
  • Unlimited number of software breakpoints
  • Full support for all on-chip breakpoints and trigger features
  • FLASH programming
  • RTOS awareness
  • Statistical performance analysis
  • Branch trace
  • Software trace based on the branch trace for SH4 (unlimited size)
  • Realtime trace based on AUD with up to 2M frames trace depth up to 200MHz
  • Non intrusive trace based performance analysis

 

Trace Connectors


Adaptation for SH4

 

Details and Configurations






Copyright © 2019 Lauterbach GmbH, Altlaufstr.40, 85635 Höhenkirchen-Siegertsbrunn, Germany   Impressum     Privacy Policy
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice. Report Errors
Last generated/modified: 03-Dec-2019