FAQs for RAM Trace Port Trace


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PDF document ( 45KB / 21-Nov-2019 )


How to avoid "TARGET FIFO OVERFLOW" error messages in the trace window? (TMS470/TMS570)
Ref: 0354

  • Increase the traceport data throughput via RTP.PortClock.
  • Increase the frequency of the system clock (HCLK) in relation to the CPU clock (GCLK).
  • Reduce the size of the RAM area to be traced via RTP.TraceMode.RAM<x>.SECTion<y>.Size.
  • Include some 'nop' operations in the relevant parts of your target’s executable code.


How to unlock the 'RTP' command? (TMS540/TMS570)
Ref: 0389

The RTP command will be unlocked for devices which actually have an RTP. If your device has not yet been unlocked, please contact Lauterbach support. Alternatively you can unlock by providing your RTPs base address to "SYStem.CONFIG.RTP.BASE".

What does the error message "Address exceeds maximum size" mean? (TMS470/TMS570)
Ref: 0351

Every address within the trace region defined by base address + size must not exceed 18 bits (RAM) or 24 bits (peripheral), respectively.

What does the error message "Internal error: No RAM/Peripheral address defined for this CPU" mean? (TMS470/TMS570)
Ref: 0390

This error occurs if the base address of the RAM and/or peripheral address space is not configured for the current device.

You can configure the base address(es) by the following PRACTICE commands:

SYStem.CONFIG.RAMBASE <address>    ; RAM base address

SYStem.CONFIG.PERBASE <address>    ; Peripheral base address


What does the warning "Entered address has been corrected to match the current blocksize" mean? (TMS470/TMS570)
Ref: 0353

The base address of the section to be traced must always be a multiple of the specified blocksize. If not, it will automatically be truncated to the next lower valid address.




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Last generated/modified: 03-Dec-2019