|
|
|
 |
How can I see the debugging (printf) output of my application?
|
| |
| Ref: 0340 |
|
Many of the demo applications generated by the XPS (Xilinx platform studio) give feedback via printf(). Therefore be sure to open a terminal window in TRACE32, otherwise the application will appear to fail working, because it is blockes waiting for the debugger to read the output data.
Use the following sequence to open a terminal window
TERM.RESet ; be sure to reset terminal functionality
TERM.METHOD mdmuart
TERM.SIZE 110. 1000. ; make TRACE32 poll the target for text output
TERM.GATE
|
|
|
|
|
Is there a trace interface for Microblaze cores?
|
| |
| Ref: 0243 |
|
Lauterbach supports a real-time trace for the Xilinx MicroBlaze core since MicroBlaze 10.0 (Vivado 2018.2 or later). The trace provides up to 4 GiB of external high speed trace memory, which is used instead of scarce on-chip memory resources for storing the trace information. Features included are: program flow and data trace as well as statistical analysis of function and task run-times, variables access, code coverage and more.
|
|
|
|
|
MicroBlaze spontaneously stops while TRACE32 is attached.
|
| |
| Ref: 0341 |
|
In some configurations of MicroBlaze using interrupts it was observed, that the core stopped
without apparent reason, if TRACE32 was attached. Without the debugger, the program runs OK.
Apparently this is because MicroBlaze's mechanism for polling the run state can fail when the core takes an interrupt.
To work around the problem, move the SW break vector to an address far away from the interrupt handler (0x10) e.g. to the address 0x40. The distance should ideally be 24 bytes or more.
SYStem.Option.BRKVECTOR 0x40 ; Attention: set this _before_ SYStem.UP
|
|
|
|
|
What can I do about "Error Reading Processor Config Register"?
|
| |
| Ref: 0407 |
|
The error message "Error Reading Processor Config Register" indicates
that the basic communication with the MicroBlaze core could not be
established.
Most of the time the error is caused by an incorrect JTAG
configuration of TRACE32. For details please refer to the
documentation of the commands SYStem.Config IRPRE, SYStem.Config
IRPOST, ...
Attention: For MicroBlaze there is one special case when the width of
the IR is bigger than 6bits (e.g. for Virtex5FXT IRWIDTH = 10bits). In
this case the IRPOST value needs to be adapted . For details please
refer to section "Detecting multicore settings" in the document
app_microblaze.pdf ("Connecting to MicroBlaze Targets for Debug and
Trace") or contact Lauterbach support.
|
|
|
|
|
Why are there no peripheral files (.PER) for Xilinx FPGAs?
|
| |
| Ref: 0422 |
|
Peripheral files (.PER) correspond to the peripheral register of a concrete system implementation (i.e. they contain the registers for a memory controller, an I2C bus, an ethernet controller, etc.). In the case of FPGAs they have to correspond to the user's system design and are application specific. Therefore no generic .PER files are available for an FPGA type (e.g. Xilinx Kintex-7 XC7K325-T-2FFG900C).
For information about creating custom .PER-files refer to the document "Peripheral Files Programming Commands" (per_prog.pdf).
|
