FAQs for Cortex-A Debugger


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PDF document ( 28KB / 10-Oct-2019 )


Access to the CoreSight ROM table

Ref: 0462
Does TRACE32 need access to the ROM table to read the CoreSight settings?

The ROM table can be scanned in TRACE32 using the command SYStem.DETECT DAP. However, TRACE32 does not rely on the ROM table. If the chip is supported by TRACE32 then it is enough to select the right CPU using the command SYStem.CPU. Otherwise, the CodeSight settings have to be set up with a script using the SYStem.CONFIG command.

CPU detection with SYStem.DETECT

Ref: 0455
I try to detect my Arm chip in TRACE32 using the command SYStem.DETECT. The CPU is however not detected and I get "NONE" in SYStem.CPU

The SYStem.DETECT command is not intended to detect the used CPU on Arm, but to detect the DAP in the JTAG chain. Please check if your chip is listed under SYStem.CPU. If not, please contact the Lauterbach support (support@lauterbach.com) and specify your TRACE32 software version. You may also check if the chip is officially supported by Lauterbach using the "Chip" search field on the Lauterbach web site.

Debugger detection by the target program

Ref: 0454
Is there a register on ARM Cortex cores that can be used by the target program to detect if a debugger is connected?

There is a register called DBGDSCR (Debug Status and Control Register) which can be used for this purpose In fact, if the debugger connects to the core it will set the bit 14 "DBGDSCR.HDBGen", the "The Halting debug-mode enable bit". It is cleared on reset.




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Last generated/modified: 10-Oct-2019