FAQs for Cortex-A/-R ARMv8 Debugger


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PDF document ( 42KB / 21-Nov-2019 )


Does TRACE32 need access to the ROM table to read the CoreSight settings?
Ref: 0462

The ROM table can be scanned in TRACE32 using the command SYStem.DETECT DAP. However, TRACE32 does not rely on the ROM table. If the chip is supported by TRACE32 then it is enough to select the right CPU using the command SYStem.CPU. Otherwise, the CodeSight settings have to be set up with a script using the SYStem.CONFIG command.

How to generate and load debug information using a Greenhills Compiler?
Ref: 0432

Depending on the version the following parameters must be passed to the compiler:
C-Code: -g -dual_debug -dwarf2
C++-Code: -g -dual_debug -dwarf2 -no_ignore_debug_references
Please note that not all options can be selected in the user interface and must be added manually in the compilers configuration file. Within TRACE32 it is recommended to load the files with option /GHS e.g.:
Data.LOAD.Elf filename /GHS


Is it possible to set an on-chip breakpoint on a physical address for a processor with enabled MMU?
Ref: 0476

On-chip breakpoints trigger on addresses used by the core. If the Memory Management Unit (MMU) is enabled, the core uses virtual addresses. It is thus not possible to set an on-chip breakpoint using the physical address. Please note that secifying the memory class A: has no effect, the given address will be simply considered as virtual address. You should instead find all virtual addresses that are mapped to the given physical address and set an on-chip breakpoint on each virtual address. This won't work however in case the address mapping is created after setting the breakpoint.
The TRACE32 command MMU.INFO <address> can be used to find all virtual to physical address mappings for a given physical address.

Is there a register on ARM Cortex cores that can be used by the target program to detect if a debugger is connected?
Ref: 0454

There is a register called DBGDSCR (Debug Status and Control Register) which can be used for this purpose In fact, if the debugger connects to the core it will set the bit 14 "DBGDSCR.HDBGen", the "The Halting debug-mode enable bit". It is cleared on reset.

The CPU selection is set to "NONE" when I try to detect my Arm chip using the command SYStem.DETECT.
Ref: 0455

The SYStem.DETECT command is not intended to detect the used CPU on Arm, but to detect the DAP in the JTAG chain. Please check if your chip is listed under SYStem.CPU. If not, please contact the Lauterbach support (support@lauterbach.com) and specify your TRACE32 software version. You may also check if the chip is officially supported by Lauterbach using the "Chip" search field on the Lauterbach web site.




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Last generated/modified: 03-Dec-2019