FAQs Archive for TriCore Debugger
|For my TriBoard-TC1766 I have set up my trace configuration correctly, but all I get is FLOWERROR.|
On some older TriBoards-TC1766 (below version .300) two trace lines are swapped. Use "SYStem.Option TB1766FIX ON" for correcting this by software.
|I have loaded my application into the target, but I can not step or go away from the reset address. (TC11XX_Audo-NG)|
TC11xx and AUDO-NG devices, e.g. TC1766, TC1796, have a silicon bug that prevents the instruction cache from being invalidated when the CPU is halted.
Software breakpoints (which are used by default) use the DEBUG16 instruction to halt the processor and are being replaced in memory by the original instruction when the core is released to running state. Due to the silicon bug, the DEBUG16 instruction is still in the instruction cache at this time and will be executed.
|My Infineon TriBoard does not boot and SYStem.Up fails. (AURIX)|
Please make sure the Hardware Boot Configuration settings are correct. On Infineon TriBoards there is a DIP switch which allows to modify the HWCFG settings.
TC275T-Bstep an later devices usually require DIPSWITCH1 to be off, otherwise the board is not powered correctly (check the voltage LEDs). Please consult the TriBoard Manual or other Infineon documentation for details.
|The debugger displays wrong data for internal memory, but the processor behaves correct. (TC10GP_TC11Ix)|
TC10GP and TC11Ix have a data cache (DCACHE within DMI) which is not accessible by the debugger. The debugger shows invalid internal memory instead. This bug only affects the internal memory. The cache from EMU can be bypassed by switching to the uncached memory segment.
As a workarounds, disable the cache.
For TC1110, TC1115 and TC1130 this problem is fixed by flushing the cache.
|When single-stepping I always enter the interrupt handler although IMASKASM and IMASKHLL is enabled.|
Some devices with a TriCore v1.3.1 core have a silicon issue that an acknowlegded interrupt is always taken, even if interrupts are disabled after acknowlege. This is documented as Errata CPU_TC.115.
Affected devices: TC1167, TC1197, TC1736, TC1767, TC1797 and corresponding Emulation Devices.
|When switching to SYStem.Mode Attach, the CPU can be stopped and started but breakpoints are not working.|
For older TriCore deriviatives (e.g. Rider-D, TC10GP, TC17x5, TC19x0, ...) OCDS can only be enabled at reset. When attaching, the target is running and reset has already been performed.
If you want to use breakpoints and single stepping, you have to pull nBRKIN and nOCDSE to ground at reset.
This does not apply to newer TriCore CPUs such as AUDO-NG, AUDO-FUTURE or newer.
Copyright © 2020 Lauterbach GmbH, Altlaufstr.40, 85635 Höhenkirchen-Siegertsbrunn, Germany
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice. Report Errors
Last generated/modified: 14-Jan-2020