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FAQs for Debugger Hardware

Questions
How can I use multiple USB devices with several TRACE32 instances?
Is it possible to use both uTrace connectors, A and B to debug two targets?
Ist it possible to debug with two debug boxes and two debug cables two processors over one single JTAG connector?
Should I use one or two power supplies, USB/Ethernet cables when two Lauterbach debug modules are connected together via PodBus?
Why do I get the error message "Plugged debug cable is not suitable for CPU" ?
Why does my TRACE32 software version not work with PowerDebug PRO or PowerTrace PX?

FAQs for FLASH Programming (Memory-Mapped)

Questions
Can I write my own FLASH algorithm?
How can I improve the flash programming time?
Which FLASH devices are currently supported?

FAQs for Host Driver Software

Questions
[Linux] How do I enable icons on the pull down menus on Ubuntu?
[Linux] How to add the TRACE32 font directory under Fedora distributions?
[Linux] I receive the error message "Communication with Acrobat Reader failed".
[Linux] What are the prerequisites for the TRACE32 host driver(s) on Linux?
[Linux] What are the prerequisites for the TRACE32 QT host driver(s) on Linux?
[Linux] What to do if I get a error message under Ubuntu regarding PCF bitmap fonts?
[Linux] What to do when a system library is missing?
[Linux] What to do when a warning of a deprecated TRACE32 executable occurs?
[Linux] Why isn't Linux booting after installing USB driver file 10-lauterbach.rules?
[MacOS] What can I do if the USB interface is not working on MacOSX 10.11 El Capitan?
[Solaris] What to do when a system library is missing?
[Windows] What is the minimum TRACE32 version that supports Windows 10?
[Windows] Why do I have to install a Lauterbach PODBUS USB driver for each USB port?
How can I use multiple USB devices with several TRACE32 instances?
How do I proceed if I get the error message "Fixed width font t32sys not found"?
How do I start a hidden instance of TRACE32?
The debugger is accessed via Internet/VPN and the performance is very slow. What can be done to improve debug performance?
What can I do if the USB interface is not working properly or very slowly with VMware?
What could be the reason for the "no response from InterCom" message?
What to do when a TRACE32 screen driver library is missing?
Why are some or all client windows minimized, when switching virtual desktops?
Why do I get a file version conflict after software update?
Why do I get the error message "FATAL EROR from PODBUS-driver: could not get nodename"?
Why does the connection to my debugger via ethernet fail? It starts always as a "Serial Monitor" instead?

FAQs for Installation Guide

Questions
How can I realize a silent installation under Windows?

FAQs for OS-aware Debugging

Questions
Can I write my own OS awareness?
The EDK compiler cannot find libmpfr and libgmp under ubuntu
The error message "PPCSIM Trap <number>" appears when using the OS awareness
Where do I get updates of the awareness?
Why does all RTOS menus/commands report: 'Sorry: Couldn't get symbol addresses'?

FAQs for RTOS Debugger for FreeRTOS

Questions
TASK.TaskList is flickering while target is running
Why does TASK.STacK not show a complete stack coverage?

FAQs for RTOS Debugger for Linux

Questions
After booting Linux, why does the target die or loose connection to the debugger?
After halting at a function entry point with an on-chip breakpoint, or after stepping into a new function, the List window shows "???" for all assembler lines.
Breakpoint are not working properly or stop working completely for the e500 cores
On-chip breakpoints do not stop the program execution during kernel boot.
The kernel boots fine without debugger, it crashes however when the debugger is attached.
What does the kernel message soft lockup mean?
What is needed to revise a Linux trace with a TRACE32 instruction set simulator?
Why does "MMU.FORMAT LINUX swapper_pg_dir" report "invalid combination"?

FAQs for RTOS Debugger for OSEK/ORTI

Questions
I get the error message "register set not defined" when viewing the context of a task that is currently not being executed.

FAQs for Script Language PRACTICE

Questions
Is it possible to use PRACTICE macros inside dialogs?
What's the long form and meaning of abbreviated TRACE32 commands in CMM scripts? Which shorter syntax is available?
WinPrint doesn't print the whole content of a TRACE32 window (e.g. FPU.view) to a file, I only get a part of the window printed.

FAQs for TRACE32 Maintenance Check

Questions
After installing a Software Update, TRACE32 complains about an invalid license and switches to demo mode.
How do I set up TRACE32 for floating licenses?
What kind of Maintenance Contract do I need for the AutoFocus-II Preprocessor?
When do I need multiple maintenance contracts in one single debug cable?
Where can I store my maintenance key?

FAQs for TRACE32 Software

Questions
How can I save the memory content in Intel HEX format? Using the command Data.SAVE.IntelHex the generated address field is incorrect.
How can I send commands remote to TRACE32?
I get the error message "entry near offset ... in file ... (use DUMP)" when loading an object file using the Data.LOAD command.
I get the error message "Overlapping memory location" when loading an object file using the Data.LOAD command.
Instead of getting a significant error message, I'm getting an error in the following form: "error occured, id='...'"
Is it possible to check the progress of the execution of a TRACE32 command through the Remote API?
Is it possible to see the value of a C macro in TRACE32 PowerView?
Is it possible to use Eclipse as debugger user interface instead of TRACE32 PowerView
What loader option is required to convert CYGWIN paths to DOS paths?
What's the meaning of the error message: "FATAL ERROR from InterCom-driver: can not bind read socket" ?
Why do I get the error message "Plugged debug cable is not suitable for CPU" ?
Why does my terminal window (TERM) not work with COM port 10 or larger?
Why does TRACE32 no longer start the script t32.cmm ?

FAQs for TRACE32 Software Updater

Questions
Are there any known issues?
Can I revert an updated installation back to the state before the update?
Can I update my TRACE32 installations automatically to the latest released version on any operating system?
Can I use the updater on my operating system?
When does the actual update process start?
Which information does the updater send to Lauterbach?

FAQs for ARC Debugger

Questions
How can I see the auxiliary registers?
I've received the error message "Emulation debug port fail". What has happened?
My target application never reaches the main() function. What's up?
Why does PowerView open a TERM.GATE window automatically?

FAQs for ARM/Cortex Trace (parallel)

Questions
What does FLOWERROR or HARDERROR mean?
What is different between pin 14 (VTref(JTAG)) and pin 12 (VTref(ETM)) on ETM MICTOR connector?
What kind of Maintenance Contract do I need for the AutoFocus-II Preprocessor?
Which function does the EXTRIG on the ETM MICTOR connector have?
Which trace port bandwidth is supported with the different TRACE32 modules and ETM preprocessors?

FAQs for AVR32 NEXUS Debugger and Trace

Questions
Are there modifications of Atmel EVBs for using Nexus trace ?
Is a breakpoint instruction allowed in the code ?
Which impacts regarding real time behavior must be expected if the Nexus trace is activated?

FAQs for ColdFire BDM Debugger

Questions
How do I instrument my source code for selective tracing?

FAQs for Cortex-A ARMv7 JTAG Debugger

Questions
Does TRACE32 need access to the ROM table to read the CoreSight settings?
How to generate and load debug information using a Greenhills Compiler?
Is it possible to set an on-chip breakpoint on a physical address for a processor with enabled MMU?
Is there a register on ARM Cortex cores that can be used by the target program to detect if a debugger is connected?
The CPU selection is set to "NONE" when I try to detect my Arm chip using the command SYStem.DETECT.

FAQs for Cortex-A/-R ARMv8 Debugger

Questions
Does TRACE32 need access to the ROM table to read the CoreSight settings?
How to generate and load debug information using a Greenhills Compiler?
Is it possible to set an on-chip breakpoint on a physical address for a processor with enabled MMU?
Is there a register on ARM Cortex cores that can be used by the target program to detect if a debugger is connected?
The CPU selection is set to "NONE" when I try to detect my Arm chip using the command SYStem.DETECT.

FAQs for Cortex-M (ARMv6/7/8 32-bit) Debugger

Questions
Does TRACE32 need access to the ROM table to read the CoreSight settings?
How to generate and load debug information using a Greenhills Compiler?
The CPU selection is set to "NONE" when I try to detect my Arm chip using the command SYStem.DETECT.

FAQs for Intel~ 86/x64 JTAG Debugger

Questions
Is it possible to set an on-chip breakpoint on a physical address for a processor with enabled MMU?
What is the difference between the executables t32mx86 and t32mx64?

FAQs for MicroBlaze Debugger

Questions
How can I see the debugging (printf) output of my application?
Is there a trace interface for Microblaze cores?
MicroBlaze spontaneously stops while TRACE32 is attached.
What can I do about "Error Reading Processor Config Register"?
Why are there no peripheral files (.PER) for Xilinx FPGAs?

FAQs for MPC5xxx and SPC5xx Debugger

Questions
Can I use a longer extension cable?
Can the Nexus port totally be disabled? (NEXUS-MPC5500)
Does TRACE32 NEXUS MPC5XXX support 16 bit MDO operation? (NEXUS-MPC5500)
How to manage external watch dog timer (WDT) control? (NEXUS-MPC5500)
Is there any impact on processing power when using Nexus trace and JTAG debugger? (NEXUS-MPC5500)
Some variables show wrong values or can not be modified during run-time. (MPC55XX/56XX)
SYStem.Option.FREEZE seems not to have any influence on the timers/counters. Is it possible to let the timers/counters run even when a breakpoint is hit or the cores are halted?
The disassembly shows invalid code with many undef/align "instructions". Trace list shows FLOWERRORS. How can I fix this? (MPC55XX)
The external bus interface (EBI) fails when the debugger (JTAG or NEXUS) is connected. (MPC55XX)
There is no debugger access due to a censored device. What can I do? (MPC55XX)
What are the impacts of the Nexus probe during energy measurement? (NEXUS-MPC5500)
What causes "emulation pod configuration error" when trying to start the debug session?
What problems can cause that the debugger fails to connect to an XPC56XX EVB motherboard? (MPC56XX)
Why are sometimes certain messages not visible in the trace? (NEXUS-MPC5500)
Why do I get power fail messages, despite target power is correct at the reference pin? (NEXUS-MPC5500)
Why does the debugger display bus errors (question marks) for the internal SRAM or local memories? (MPC5XXX)

FAQs for MPC74XX Debugger

Questions
Is there a workaround for MP7448 chip errata #24? (MPC7448)
SYStem.UP fails with MPC744x/MPC745x or MPC86xx. (MPC744X/745X/MPC86XX)
The debugger can not display flash data and/or memory mapped registers, although the target program can access this memory/registers. (MPC744X/745X)
What causes "emulation pod configuration error" when trying to start the debug session?

FAQs for MPC86XX Debugger

Questions
SYStem.UP fails with MPC744x/MPC745x or MPC86xx. (MPC744X/745X/MPC86XX)

FAQs for NIOS II Debugger

Questions
Analyzer.List/Trace.List doesn't show correct data. What's wrong?
Which preparations are necessary for off-chip trace in a NIOS II design?
Why is my NIOS II stuck at the reset vector and I cannot step away from it?

FAQs for PowerQUICC II/Pro Debugger

Questions
After SYStem.Up or when opening a dump/register window all displayed memory data is invalid (e.g. 0xDEADBEEx). (MPC826x/80/7x/41/42)
The debugger's memory access works after SYStem.UP, but fails after the running the application. What can be the problem? (MPC83XX)
There are few exceptions where SYStem.Option.BASE.AUTO (default setting) does not work: (MPC82XX)
There are few exceptions where SYStem.Option.IP.AUTO (default setting) does not work: (MPC82XX)
What causes "emulation pod configuration error" when trying to start the debug session?
When changing the IMMR base address to a new value, memory access results in a buserror (for software since 11/2007). (MPC82XX)
When changing the IMMR base address to a new value, memory access results in a buserror (for software before 11/2007). (MPC82XX)
Why does the debugger fail to connect to the processor after erasing FLASH memory? (MPC82XX)
Why does the debugger fail to connect to the processor after erasing FLASH memory? (MPC83XX)

FAQs for PowerQUICC III Debugger

Questions
Breakpoints and HLL steps do not work on MPC85XX. (MPC85XX_P10XX_P2020_BSC913X)
Breakpoints are not working properly or stop working completely. (MPC85XX_P10XX_P2020_BSC913X)
Debugging critical interrupts on MPC85XX. (MPC85XX_P10XX_P2020_BSC913X)
I cannot write data to the internal SRAM. (MPC85XX_P10XX_P2020_BSC913X)
SYStem.Option.FREEZE seems not to have any influence on the timers/counters. Is it possible to let the timers/counters run even when a breakpoint is hit or the cores are halted?
SYStem.Up does not work on my new board, how can I analyze the problem using the debugger? (MPC85XX_P10XX_P2020_BSC913X)
What causes "emulation pod configuration error" when trying to start the debug session?
Why does the CPU stop unexpected after the operating system booted? (MPC8540_MPC8560)
Why does the debugger stop at a wrong address with error message "imprecise debug event" when a breakpoint is set? (MPC85XX_P10XX_P2020_BSC913X)

FAQs for PowerTrace for NEXUS

Questions
How do I correctly connect a Nexus Probe to a PowerTrace unit?
I don't know exactly which signals from MCU must be connected to which signal on the AUX-port connector. Must certain signals be crossed?
Is there any reason why symbol addresses and names are not displayed from the beginning of the trace?
What is the reason for "Incorrect Nexus-POD CPLD revision" message?

FAQs for PPC400 Debugger

Questions
Error message: software breakpoints not possible with current system setting (PPC4XX)
How can I enable access to ISOCM memory in Xilinx VirtexFX chips?
How should I connect TRACE32-ICD JTAG connector to a Xilinx target? What are the correct IRPRE/IRPOST and DRPRE/DRPOST settings? (Virtex-PPC4XX)
How to enable/configure muxed trace interface for TRACE (PPC440GX)
On SYStem.Up I got emulation debug port problem. (PPC4XX)
Stepping over TLBWE instruction result in another program flow as in run mode. (PPC4xx)
The SYStem.Up/InTargetReset doesn't work with an APM86xxx device! The contents of the memory views are wrong. (APM86190_APM86290_APM86491_APM86692_APM86791)
What does a "Protected Access Error" mean? (APM86190_APM86290)
What is the difference between APM86x90 and APM86x90B?
Why do flow errors exist while ML310 tracing works? (Virtex-PPC400)
Why does SYStem.Detect.CPU detect an ApmPacketProSingle/Dual and not the correct CPU derivative. (APM86491_APM86692)
Why does the debugger show only flow errors? (Virtex-PPC400)
Why does the reset vector of the IOP480 not point to the reset vector of the 401 core? (IOP480)

FAQs for PPC600/750 Debugger

Questions
Data/Instruction address breakpoints do not work or stop working at a certain point in target code. (MPC82XX/83XX)
Strange behavior during or after SYStem.Up; Step/Go do not work correctly; External memory flickers.
What causes "emulation pod configuration error" when trying to start the debug session?
Writing SYPCR has no effect.

FAQs for QDSP6 Debugger

Questions
When attaching to the Hexagon core, I get an error message: "ISDB locked, core not ready". What does this mean and how can I debug my application?

FAQs for QorIQ PowerPC 32/64 Bit Debugger

Questions
SYStem.Option.FREEZE seems not to have any influence on the timers/counters. Is it possible to let the timers/counters run even when a breakpoint is hit or the cores are halted?

FAQs for RAM Trace Port Trace

Questions
How to avoid "TARGET FIFO OVERFLOW" error messages in the trace window? (TMS470/TMS570)
How to unlock the 'RTP' command? (TMS540/TMS570)
What does the error message "Address exceeds maximum size" mean? (TMS470/TMS570)
What does the error message "Internal error: No RAM/Peripheral address defined for this CPU" mean? (TMS470/TMS570)
What does the warning "Entered address has been corrected to match the current blocksize" mean? (TMS470/TMS570)

FAQs for RH850 Debugger

Questions
Is it possible to debug RH850 using JTAG-V850 N-Wire Debugger for V850?
What is the impact of disabling this RDY pin in RH850 target?
When displaying the content of the Data-Flash on my RH850 device, the values in some address are not stable.

FAQs for TriCore Debugger

Questions
After SYStem.Mode Up the target is running and the debugger shows "running (PLL lock wait)". How can I stop program execution?
For a better debug performance, should I use the CombiProbe instead of a TriCore debug cable?
I cannot connect to my target after installing Version 2018.01.0000092378 or newer.
JTAG communication is not possible with some AURIX devices. (AURIX)
My CPU is no longer hold in SYStem.Mode Down after installing version 2018.01.0000092477 or newer.
My Infineon TriBoard does not boot and SYStem.Up fails. (AURIX)
Single stepping seems to hang when debugging optimized code.
TRACE32 shows error "ambiguous symbol", what can I do about it? (AURIX)
What Debug Protocol should I use: DAP or JTAG?
When setting a read/write breakpoint to a peripheral module the program execution is not stopped.
When single-stepping I always enter the interrupt handler although IMASKASM and IMASKHLL is enabled.
When the CPU has halted the debugger shows "stopped by swevt" or "stopped by tr0evt".
When using on-chip breakpoints, the Memory Protection Registers are overwritten.
When using target based flash programming algorithms, flash is not completely erased or programmed.
Why does the TriCore chip show that an SMU alarm was raised?

FAQs for V850 Debugger

Questions
Is it possible to debug RH850 using JTAG-V850 N-Wire Debugger for V850?




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Last generated/modified: 04-Dec-2019