TRACE32® supports Infineons’ 2nd Generation of AURIX™ family
Hoehenkirchen-Siegertsbrunn – October 2016, Lauterbach, the leading manufacturer of microprocessor development tools, is the first to provide debug support for the new 2nd Generation AURIX™ family of Infineon with the Lauterbach TRACE32 Debugger.
The close cooperation of the developers at Infineon and Lauterbach has resulted in availability of tools and silicon at the same time. Customers have immediate access to TRACE32®, the industry’s leading development tool, and can take advantage of the premium technical support available worldwide from Lauterbach.
The new AURIX™ TC3xx family is the platform of Infineon’s next generation MCU family to meet the requirements of the latest automotive powertrain, safety and advanced driver assistance system (ADAS) applications. The chips contain up to six 32-bit cores, 16MB Flash, a Hardware Security Module, a Generic Timer Module (GTM) and a Standby Controller.
Lauterbach already supports debugging, tracing and flashing of these new devices with an updated version of TRACE32®. It allows synchronous start and stop of all six cores as well as independent control of individual cores. Program flow, data flow, as well as the state of peripherals like the DMA controller can be recorded in real time.
The trace can either be recorded in the on-chip trace memory or forwarded to Lauterbachs’ PowerTrace Modules using the AGBT trace link. As is expected from these tools functions such as high-level language debugging and an extensive view of peripherals are supported.
One more highlight is the support of the Hardware Security Module. A second instance of TRACE32 PowerView enables run control as well as the inspection of variables and memory. The free add-on TRACE32 ICD GTM allows to debug the program flow of the Generic Timer Module (GTM). In addition a real-time trace of program flow and I/O-pin behavior can be recorded. TRACE32 also supports debugging of the standby controller and debugging via a CAN port using DAP over CAN Physical Layer (DXCPL).