TRACE32® supports S32V Processor Family from Freescale®
Hoehenkirchen-Siegertsbrunn, December 2015 – Lauterbach, the leading manufacturer of microprocessor development tools, has announced its support for the S32V family of processors from Freescale®.
The S32V family of processors features with ARM Cortex®-A cores as well as APEX image cognition processor cores and is designed to support computation-intensive applications for image processing.
The Lauterbach TRACE32 tools have been supporting ARM Cortex cores since years. With the new support for the APEX architecture the tools are now able to fully support the S32V processors with debugging and tracing. The TRACE32 debug tools provide quick, effective S32V processor debugging through a standard JTAG interface for the entire debug process, including run control, OS-support, multicore debugging and on-chip trace. These tools can be connected to the hosts via USB 3.0 or fast Ethernet ports. The included TRACE32 PowerView software provides an efficient and user-friendly high-level language (HLL) debugging for C and C++.
The trace tools of TRACE32 connect to the integrated trace port on the target cores and records program flow information directly from the core in real time. This recording provides the developer with fast and logical troubleshooting capabilities to detect complex errors that only occur under run-time conditions. In addition the time-stamped program flow can be analyzed to provide an overall view of the system performance as well as quality assurance features such as code coverage and cache analysis.
“The S32V family of vision processors delivers automotive-grade performance for ADAS applications, and Freescale is committed to providing developers an intuitive and integrated development /enablement experience for these world-class devices,” said Davide Santo, Global ADAS Product Line Manager at Freescale. “The integrated heterogeneous debugger support for the Cortex and APEX cores in the TRACE32 tools is an important part of Freescale’s focus on enablement and technology leadership.”