Power Architecture PQII Trace


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Picture
  Highlights
256/512 MByte trace memory
133 MHz clock frequency
180 trace channels
Address breakpoints
CPU module available
Time stamp
Context tracking system
Performance analysis
Coverage analysis
Statistic functions
Graphical trace views
RTOS statistics
Support for MPC8240, MPC8260


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Technical Support
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Features


The RISC Trace for the PowerQuicc II family (MPC8260, MPC8240) samples 180 lines up to 66 MHz bus cycle into an 64K trace buffer. This allows DRAM clock frequencies up to 133 MHz. The RISC trace module provides time stamp features and uses the internal trigger capabilities of the chips interface. The system can run with on PCs or workstations.

The adaption can be done by an universal connector or by special adapters with the same pinning like the FIRE emulator systems.

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Adaption Methods


Target Adaption for MPC8240

Target Adaption for MPC8260

Connector for RISC-Trace PowerQuiccII



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Details and Configurations






Copyright © 2012 Lauterbach GmbH, Altlaufstr.40, D-85635 Höhenkirchen-Siegertsbrunn, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice.
Last generated/modified: 1-Feb-2012