M32R Trace


The embedded tools company


Picture
  Highlights
256/512 MByte trace memory
Performance analysis
Function and task run-time measurement
Code coverage
Debugger function included
Support for RENESAS
Support for M32176, M32180, M32192


Link Dim
Modules
Adaptions
Dimensions
Freq
Max. Operation Frequency
Volt
Operation Voltage
Order
Order
Information
Support
Technical Support
Debugger for M32R
PowerTrace

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Features


The PowerTrace on the M32R samples all trace port lines up to a speed of 100 MHz (160 MHz Core) into the trace buffer. The max. size of the trace buffer is 64/128 MFrames (1 frame per clock).

The trace provides time stamp features and can serve the filter and trigger capabilities of the M32R. The system can run on PCs or any workstation.

The connection to the target is done by standardized adapters.


Program and Data Trace

Trace Speed > 100 MHz

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Breakpoints


    Preexecution PC Break4
    Access Break2 breaks for level 1
    2 breaks for level 2
    Event Function2 for access
    2 for pc pass
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IDE - Integrated Development Environment


ASM Debugger
  • Supports almost all file formats
  • Assembler source-level debugging
  • Advanced memory display
  • Inline assembler
  • Memory tests
  • Customizable windows
  • Peripheral windows
  • Terminal window
  • Semi-hosting
  • Flash programming
  • Full support for peripherals
High-Level-Language Debugging
  • Supports multiple languages
  • Full support for C++
  • Integrated into TRACE32 environment
  • Supports most compilers and hosts
  • Same user interface on different hosts
  • High speed download
  • Debugs optimized code
  • Display of function nesting
  • Display of linked lists
  • Powerful expression evaluation
Compiler Support

C

  • GNU-C (Free Software Foundation, Inc.)
    • ELF/DWARF2
  • CC32R (Renesas Technology, Corp.)
    • ELF/DWARF
  • D-CC (Wind River Systems)
    • ELF/DWARF
Multicore Debugging
  • Debugging support for homogeneous and heterogeneous multiprocessor and multicore systems
  • High quality standard debuggers can be combined for multiprocessor and multicore systems
  • All TRACE32-ICD debuggers are designed to work together in a multiprocessor/multicore debugging environment
  • Fast integration of third party debuggers
  • Several processors in a single piece of silicon can share the same debug port
  • Start and stop synchronisation
Logical Display of Periperals
  • Display of onchip peripherals
  • User definable windows
  • Interactive window definition with softkey support
  • Pulldown menues for selection of choices
  • Additional description for each field
Full MMU Support
  • Full integrated support of processor′s MMU
  • Display of processor MMU registers
  • Display of MMU table entries
  • Display of address translation table
  • ′Shadowing′ MMU address translation inside debugger
  • Full virtual and physical access to target at any time
  • Debugger has optionally write access to write protected memory areas
  • Detection and decoding of software MMU tables built by operating systems
  • Support for several user space MMU tables side by side
  • TLB context tracking and git statistics via CTS
Script Language PRACTICE
  • Structured Language
  • Menu Support
  • Command Logs
  • Custom Menues
  • Custom Toolbars and Buttons
  • Custom Dialog Windows
  • 64-Bit Arithmetic
  • Numeric, Logical and String Operators
  • Direct Access to System States
NOR FLASH Programming
  • Internal and/or external NOR FLASH memories
  • All common NOR FLASH types
  • Programming of multiple NOR FLASH devices
  • Provided by debuggers and in-circuit emulators
NAND FLASH Programming
  • Generic and CPU-specific NAND FLASH controllers
  • Support all common NAND FLASH devices
  • Bad block treatment (skipped, reserved block area)
  • ECC generation
SIM Instruction Set Simulators
  • Easy high-level and assembler debugging
  • Interface to all compilers
  • Trace Buffer
  • Powerful script language
  • Software compatible to all TRACE32 tools
  • Hardware simulation
Trace-based Profiling
  • Detailed analysis of function run-times
  • Detailed analysis of task run-times and state
  • Graphical analysis of variable values over the time
  • Analysis of the time interval of a single event (e.g. Interrupt)
  • Analysis of the time interval between 2 defined events
Trace-based Code Coverage
  • Long-Time Hardware Coverage Analysis for Emulator and ETM
  • Trace Based Coverage Analysis for ICD and Emulator
  • Analysis on ASM and HLL
  • Coverage summary on modul/function level
Sample-based Profiling
  • Long-time performance analysis for functions
  • Long-time performance analysis for tasks
  • Long-time analysis of the contents of a variable or memory location and more
Logger
  • Software trace of any size stored in an array structure on the target
  • General trace format provided by TRACE32-PowerView
  • Configuration and display commands provided by TRACE32-PowerView
  • Works as trace with address and data information
  • Works as a program flow trace (SH4, PowerPC)
  • Time stamp possible
  • Predefined algorithms to fill the trace provided by Lauterbach
  • User defined algorithms to fill the trace also possible
FDX (Fast Data eXchange) Framework
  • Interaction of target application with 3rd party host application
  • No additional hardware necessary
  • High bandwidth
  • Real time data transfer
  • Software trace capabilities
Snooper
  • Samples memory while application is running
  • Support for special debug communication channels
  • All trace display and analysis functions can be used
  • Trigger on specific values
  • Dynamic performance analysis
RTOS
RTOS Support
3rd Party Integration
3rd Party Tool Integration
Help System
  • Acrobat Based Documentation
  • Fast Text Search
  • Device Specific Filtering
  • Basic and Advanced Help
  • Training Manuals Included
  • WWW Update
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Adaption Methods


Adaption for M32R

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Details and Configurations


M32176Renesas Technology, Corp.
M32180Renesas Technology, Corp.
M32192Renesas Technology, Corp.




Copyright © 2012 Lauterbach GmbH, Altlaufstr.40, D-85635 Höhenkirchen-Siegertsbrunn, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice.
Last generated/modified: 1-Feb-2012