In-Circuit Emulator for Z80 and Z180 The embedded tools company
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ICE 80 BASE
 home Products ICE In-Circuit Emulator In-Circuit Emulator for Z80  and Z180


In-Circuit Emulator for Z80 and Z180

Picture

 
20 MHz no-waitstate emulation
 
Interface with C and PLM
 
RTOS support for CMX-RTX and VRTX80
 
Banking support up to 256 banks
 
MMU support
 
Support for power down mode
 
Port analyzer
 
Cost effective 8-bit emulation system
 
Software compatible ROM-monitor
 
Support for

8085, HD64180, TMPZ84C00, Z80180, Z80181, Z8400, Z84C50, Z86x08, Z86x21, Z86x30, Z86x40, Z8S180, and more

 


The TRACE32-ICE80 supports most of the members of the Z80- and Z180-family from Zilog and Renesas. Its modular and open technology allows the fast integration of new chip designs.

A software compatible ROM monitor is also available.

TRACE32-ICE is a state of the art In-Circuit Emulator, which offers unlimited hardware breakpoints and up to 16MByte dual-ported emulation memory. The real-time trace and trigger work up to the max. speed of the CPU. The analyzer offers selective trace as well as performance analysis and statistic functions.

TRACE32 works with the highest variety of host interfaces. The communication link to the host is done by the printer port, a fibre optic interface or ethernet allowing a high-speed transfer.

TRACE32-ICE80 is also available as a compact 8-bit In-Circuit Emulator.


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ice80.pdf
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Dimensions		 Freq
Max. Operation Frequency		 Volt
Operation Voltage		 Faq
Frequently Asked Questions		 Order
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[www.zilog.com]  Zilog Home Page





TOP       ICE 80 BASE

The ICE 80 probe is a high-performance emulation system for many derivates of the Z80 family. The change between different CPU types is done by changing the adapter board. The probe supports high-speed emulation and external bank systems. It runs together with the 8 bit controller ECC8 or the 32 bit controller ECU32.

Operating Modes

  • Reset Down
  • Reset Up
  • No Probe
  • Alone Internal
  • Alone External
  • Emulation Internal
  • Emulation External

Max. Operation Frequency

  • 20 MHz

Operation with external or internal Clock

Internal Clock 0.75 to 25 MHz

Multitask Debugging

  • 1 foreground task
  • 1 background task
  • 10 tasks

Voltage and Clock Monitors for the Target System

Exception Control

  • Static Exception Setting
  • Reset
  • BUSREQ
  • Target Exception Control
  • Reset
  • Int0
  • Int1
  • Int2
  • NMI
  • Exception Trigger
  • Reset
  • Int0
  • Int1
  • Int2
  • NMI
  • Simulation
  • Exception Simulation
  • Reset
  • Int0
  • Int1
  • Int2
  • NMI
  • BUSREQ

Memory Banking (only Z80)

  • Off
  • Bank Probe
  • EPROM

Power Consumption

  • 6 W




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Copyright © 2002 Lauterbach Datentechnik GmbH, Fichtenstr. 27, D-85649 Hofolding, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice.
Last generated/modified: Jun-3-2002