In-Circuit Emulator for 8051



	Up to 32 MHz emulation

	Boundout and non bondout support

	Dual ported memory

	Trigger on internal SFR access

	Banking up to 16 MB (256 Banks)

	Interface with all compilers

	C/C++ support

	CASE tools interface

	RTOS support

	Windows9x, NT and Xwindows interface

	Support for 8031, 8032, 8051, 8052, 80C152JA, 80C152JB, 80C152JC, 80C152JD, 80C154, 80C31, 80C32, 80C321, 80C32T2, 80C51, 80C515, 80C515A, 80C517, 80C517A, 80C51FA, 80C51GB, 80C51RA, 80C52, 80C52T2, 80C535, 80C537, 80C552, 80C562, 80C592, 80C652, 80C662, 80C851, 80CL410, 8344, 83C154, 83C515A, 83C515B-4, 83C517A, 83C51FB, 83C528, 83C550, 83C552, 83C562, 83C592, 83C652, 83C654, 83C851, 83CL580, 83CL782, 87C51, 87C52, 87C552, 87C652, 87C654, 89C851, AT89C1051, AT89C2051, AT89C4051, AT89C51, C501, C502, C503, C504, C515C, COM20051, DS500T8

The TRACE32-ICE51 supports most of the members of the 8051-family from Infineon and others. The system is designed for bondout and non-bondout controllers. Its modular and open technology allows the fast integration of new chip designs.

TRACE32-ICE is a state of the art In-Circuit Emulator, which offers unlimited hardware breakpoints and up to 16MByte dual-ported emulation memory. The real-time trace and trigger work up to the max. speed of the CPU. The analyzer offers selective trace as well as performance analysis and statistic functions.

TRACE32 works with the highest variety of host interfaces. The communication link to the host is done by the printer port, a fibre optic interface or ethernet allowing a high-speed transfer.

TRACE32-ICE51 is also available as a compact 8-bit In-Circuit Emulator.

	Download full document ice51.pdf (512k)	Modules Adaptions Dimensions	Max. Operation Frequency	Operation Voltage	Frequently Asked Questions	Order Information	Technical Support
[www.infineon.com] Infineon C500 Product Catalog [www.intel.com] Intel 8051 Page [www.semiconductors.philips.com] Philips 80C51 Site

ICE 51 Base

Operating Modes

Reset Down
Reset Up
Alone Internal
Emulation External

Dual-Port Access

Slow
Fast
Advanced
Denied

Max. Operation Frequency

30 MHz

Operation with external or internal Clock

Internal Clock 0.75 to 35 MHz

Memory Banking

Off
Probe (max. 256 banks)
EPROM (max. 256 banks)

Multitask Debugging

1 foreground task
1 background task

Target Clock and Voltage Monitoring

Dedicated Breakpoint System for internal Accesses

Bit read
Bit write
Byte read
Byte write

Exception Control

Static Exception Setting
Reset
Target Exception Control
Reset
Exception Trigger
Reset
Int0
Int1
Simulation
Exception Simulation
Reset
Int0
Int1
T0
T1

Port Analyzer

Slot for Port Analyzer available

Power Consumption

Copyright © 2002 Lauterbach Datentechnik GmbH, Fichtenstr. 27, D-85649 Hofolding, Germany Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice.
Last generated/modified: Jun-3-2002