In-Circuit Emulator for 386
The embedded tools company
BASE PROBE


In-Circuit Emulator for 386

386DX 386EX 386SX

Picture
  Highlights
Supports real mode and protected mode
Support for 5V and 3.3V derivatives
Support for all privilege levels
Works with C, C++, PL/M, M2 and ADA compilers
Display of hidden registers
Debugging in boot memory
Hidden wait system
Dual ported memory
Paging support
MMU support
FPU support
CASE tools interface
RTOS support
Windows95, NT and X windows interface
 
  Introduction
The TRACE32-ICE386 supports microprocessor and controller from AMD and Intel. Its modular and open technology allows the fast integration of new chip designs.

A software compatible ROM Monitor is also available.

TRACE32 works with the highest variety of host interfaces. The communication link to the host is done by the printer port, a fibre optic interface or ethernet allowing a high-speed transfer.


Link Doc
Download full document
ice386.pdf
(552k)		 Dim
Modules
Adaptions
Dimensions		 Freq
Max. Operation Frequency		 Volt
Operation Voltage		 FAQ
Frequently Asked Questions		 Order
Order
Information		 Support
Technical Support
[developer.intel.com]  Intel i386 Site
[www.amd.com]  AMD 32-Bit



TOP       BASE PROBE

Operating Modes

  • Reset Down
  • Reset Up
  • No Probe
  • Alone Internal
  • Alone External
  • Emulation Internal
  • Emulation External

Dual-Port Access

  • Request
  • Denied

Operation Modes

  • Real
  • Protected
  • System Management

Max. Operation Frequency

  • 20 MHz 0 wait
  • 30 MHz 1 wait
  • 40 MHz 2 wait

System Clock

  • Operation with external or internal clock
  • Internal clock 0.75 to 35 MHz

Multitask Debugging

  • 10 tasks
  • 1 foreground task
  • 1 background task

Wait System

  • Additional wait cycles (1-15) may be specified
  • Hidden wait system (0-5)

Voltage and Clock Monitors for the Target System

Exception Control

  • Static Exception Setting
  • RESIN
  • NMI
  • HOLD
  • Target Exception Control
  • RESIN
  • HOLD
  • NMI
  • INTR
  • SMI
  • Exception Trigger
  • RESIN
  • NMI
  • INTR
  • HOLD
  • HLDA
  • Simulation
  • Exception Simulation
  • RESIN
  • INTR
  • HOLD
  • NMI

Interrupt Simulation

  • All Vectors 0...255




Copyright © 2010 Lauterbach GmbH, Altlaufstr.40, D-85635 Höhenkirchen-Siegertsbrunn, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice.
Last generated/modified: 8-Feb-2010