In-Circuit Emulator for the 80186 and 80196 The embedded tools company
Features
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 home Products ICE In-Circuit Emulator In-Circuit Emulator for the 80186 and 80196


In-Circuit Emulator for the 80186 and 80196

Picture

 
Works with Intel, Microsoft, Borland and many other Compilers
 
C++ support
 
Up to 40 MHz no-waitstate emulation
 
Dual ported memory
 
FPU support
 
Support for all 5V and 3.3V derivatives
 
Banking support for 16 banks (186) or 256 banks (196)
 
Supports memory split for program and data
 
CASE tools interface
 
RTOS support
 
Windows9x, NT and X windows interface
 
Support for

8086, 8088, 80C186EA, 80C186EB, 80C186EC, 80C186XL, 80C188EA, 80C188EB, 80C188EC, 80C188XL, 8XC194, 8XC196EN, 8XC196KB, 8XC196KC, 8XC196KD, 8XC198, AM186CC, AM186CH, AM186CU, AM186ED, AM186EM, AM186EMLV, AM186ER, AM186ES, AM186ESLV, AM188EM, AM188EMLV, AM188ER, AM188ES, AM188ESLV, UT80CRH196KDS, V20, V30, V40, V50

 


The TRACE32-ICE186 supports microcontroller from AMD, NEC and Intel. Its modular and open technology allows the fast integration of new chip designs.

A software compatible ROM Monitor is also available.

TRACE32 works with the highest variety of host interfaces. The communication link to the host is done by the printer port, a fibre optic interface or ethernet allowing a high-speed transfer.


Link Doc
Download full document
ice186.pdf
(634k)		 Dim
Modules
Adaptions
Dimensions		 Freq
Max. Operation Frequency		 Volt
Operation Voltage		 Order
Order
Information		 Support
Technical Support
[developer.intel.com]  Intel MCS96 Site
[developer.intel.com]  Intel i186 Site
[www.amd.com]  AMD 16-Bit Controllers





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Operating Modes

  • Reset Down
  • Reset Up
  • No Probe
  • Alone Internal
  • Alone External
  • Emulation Internal
  • Emulation External

Dual-Port Access

  • No Delay
  • Request
  • Denied

Max. Operation Frequency

  • 40 MHz

Operation with external or internal Clock

Internal Clock 0.75 to 35 MHz

Multitask Debugging

  • 1 foreground task
  • 1 background task

Wait System

  • Additional wait cycles (1-15) may be specified
  • Up to 250 wait cycles (4K blocks globally and bytewise)

Banking support

  • Up to 16 Banks of up to 1MByte size

Voltage and Clock Monitors for the Target System

Exception Control

  • Static Exception Setting
  • RESIN
  • HOLD
  • Target Exception Control
  • RESIN
  • HOLD
  • NMI
  • INT
  • DRQ
  • TMRIN
  • Exception Trigger
  • RESET
  • RESIN
  • HOLD
  • HLDA
  • Simulation
  • Exception Simulation
  • RESIN
  • HOLD
  • NMI
  • INT

Interrupt Simulation

  • All Vectors 0...255




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Copyright © 2002 Lauterbach Datentechnik GmbH, Fichtenstr. 27, D-85649 Hofolding, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice.
Last generated/modified: Jun-3-2002