FIRE Emulator for C166S V2 Family

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FIRE Emulator for C166S V2 Family  (XC161, XC164)
Full support for C166S V2 family
Full support for KEIL, TASKING, COSMIC and GNU compilers
40 MHz no-wait-state operation
Injected access to all memory areas
Dual-port access for ROM and external bus
Shadow RAM for XRAM and IRAM
FLASH Programming Support
Hardware Dequeuing
Code Coverage
Selective trace on registers, peripherals and local variables
Trigger on internal register access, bit, byte, and word variables
Trace on external and BONDOUT busses, bus and clock cycle trace
Clip-Over, Solder-On and YAMAICHI adapters
Support of all derivatives, also non-public versions
Compatible OCDS debugger available
Support for XC161CJ, XC161CS, XC164CM, XC164CS, XC164D, XC164GM, XC164KM, XC164LM, XC164N, XC164S, XC164SM, XC164TM, XC167CI
The FIRE-C166S V2 emulator module supports the whole C166S V2 family. All features of the BONDOUT chips are supported, trigger and selective trace is possible on internal addresses and data, on registers and on peripheral accesses. 192 extra trace channels are used to trace all BONDOUT signals. The ROM and FLASH memory is emulated by an extra emulation system with separate breakpoints and execution flags for code coverage. The emulator can simulate bootstrap sequences and FLASH operation.

Max. Operation Frequency
Operation Voltage
Technical Support

Demo Software for Download



Modules for FIRE XC166

The FIRE XC166 Emulator consists of 3 modules:

  C166S V2 Bondout Trigger Module
  C166S V2 Bondout Module
  CPU Adapter
  Adapter (Clip-Over, Solder-On, AMP, YAMAICHI)


Bondout Module

Operating Modes

  • Reset Down
  • Reset Up
  • Alone Internal
  • Alone External
  • Emulation Internal
  • Emulation External

Operation Frequency

  • 40 MHz Zero-Waitstate FLASH Emulation
  • 40 MHz External Memory Emulation with Zero Wait States and Dualport Access (Injected)

Dual-Port Access

  • Non-Intrusive Access for ROM/FLASH (Shadowing)
  • Non-Intrusive Access for External Emulation Memory
  • Non-Intrusive Access Access for XRAM
  • Injected Access to all memory areas

FLASH Emulation

  • 128K FLASH emulation (overlay RAM)
  • 128K monitor RAM
  • No speed limit
  • Direct access by shadowing

External Bus Emulation

  • Up to 8 MByte with ARAM
  • Address reconstruction
  • All bus modes
  • Non-intrusive dual-port access
  • 1 wait state at 40 MHz

High-Speed External Bus Emulation

  • 1 MByte at 16 Bit
  • 0 wait state at 40 MHz
  • Limited to CS0 (external FLASH emulation)

High-Speed Download

  • 750 KByte/sec by JTAG to internal and external memory
  • JTAG hardware accelerator

Trace Operation

  • Bondout CPU cycles (fully depipelined)
  • External BUS cycles
  • Internal and external cycles
  • Clock Trace

HLL Debugging

  • Full support in real-time
  • ROM and external busses
  • Break-before-line operation
  • HLL single step in real-time
  • Trigger and trace on local variables
  • Trigger and trace on bit variables


  • XC16X/ST10 (COSMIC)
  • C166 (KEIL)
  • C166 (TASKING)


  • CP166 (TASKING)

RTOS Support

Operation with external or internal Clock

  • 1..50 MHz internal clock (XTAL1)
  • external or internal clock (32kHz) for XTAL3

Voltage and Clock Monitors for the Target System

Exception Control

  • Static Exception Setting
    • RSTIN
    • NMI
  • Target Exception Control
    • RSTIN
    • NMI
  • Exception Trigger
    • RSTOUT
    • RSTIN
    • TRAP

Reset Control

  • Support of all reset modes by emulator (standalone and with target)

Monitor and Injection Control

  • Injection and monitor level can be selected separately

Foreground Monitor Support

  • Support of foreground monitor systems in FLASH and External Memory

Bondout CPU

  • Bondout chip on socket for easy replacement


Bondout Trigger and Trace Module

Bondout Trace with 192 Channels

  • 24 Bit Code Execution Address
  • 24 Bit Operand Read Address
  • 24 Bit Operand Write Address
  • 16 Bit Operand Data
  • 32 Bit Opcode
  • 24 Bit Control Signals
  • 48 Bit MAC Unit

Hardware Dequeuing

  • Automatic dequeeing of all data and control signals
  • Simple trigger and selective trace control

Code Coverage

  • Two 1 or 4 MByte areas, can be remapped to exery address within the full address range
  • Only execution cycles, no prefetches

Data Read Access Flag System

  • 2 ranges with 1 or 4 MByte each, can be remapped to exery address within the full address range
  • 1 byte resolution

Data Write Access Flag System

  • 2 ranges with 1 or 4 MByte each, can be remapped to exery address within the full address range
  • 1 byte resolution

Code Breakpoint Memory

  • 4 breakpoint areas with 1 MByte each
  • Dynamic remap to every base address
  • 4 different breakpoints types can be defined
  • Every breakpoint can be qualified by data value, mask or pattern (local variable triggering)

Data Access Breakpoint Memory

  • 4 Breakpoint Areas with 1 MByte each
  • Dynamic remap to every base address
  • 4 different breakpoints types can be defined
  • Separate READ and WRITE breakpoints
  • Byte aligned breakpoints
  • Every breakpoint can be qualified by data value, mask or pattern

Shadow Memory

  • 1 MByte Shadow Memory
  • Can be remapped
  • Tracking of external, IRAM and XRAM variables on the fly, non intrusive

Read-Before-Write Trigger

  • For XRAM and IRAM
  • Can be remapped


CPU Adapters

Adapters for XC161CJ

  • ET-1109 Clip Over Adapter for ET144-QF63
  • ET-1110 Surface Mountable Adapter for ET144-QF63
  • YA-1111 Emul. Adapter for YAMAICHI socket ET144-QF63
  • TO-1310 Emul. Adapter for T0 socket ET144-QF63
  • TO-1311 Emul. Adapter TO-surface mount. ET144-QF63

Adapters for XC164CS

  • YA-1091 Emul. Adapter for YAMAICHI socket ET100-QF49
  • ET-1092 Surface Mountable Adapter for ET100-QF49
  • TO-1250 Emul. Adapter for T0 socket ET100-QF49
  • TO-1251 Emul. Adapter TO-surface mount. ET100-QF49
  • TO-1255 Emul. Adapter for T0 socket ET100-SE 0.4mm

Peripherals Access

Port Analyzer

  • Trace an all peripheral ports

On-Circuit Emulation

  • Support for clip-over adapters
  • Power-up reset for target CPU by emulator

Automatic Setup Configuration by Reading Reset Vectors

Support of Reset Vectors for Standalone Operation


Compatible OCDS Debugger

XC2000/C166SV2 Debugger

  • Full HLL and ASM support available
  • Batch Processing
  • Supports Keil, Tasking and GNU Compilers
  • 1.8 .. 5.0 Volt Support
  • Support for Internal Triggers
  • Break on Code or Data
  • Unlimited Software Breakpoints
  • Fast download


Port Analyzer


IDE - Integrated Development Environment

Copyright © 2017 Lauterbach GmbH, Altlaufstr.40, D-85635 Höhenkirchen-Siegertsbrunn, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice. Report Errors
Last generated/modified: 04-Apr-2017