FAQs for JTAG-MPC5500

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PDF document ( 39KB / 07-Sep-2016 )


Device censored (MPC55XX)

Ref: 0313
There is no debugger access due to a censored device. What can I do ?

The MPC5XXX processors implement a censorship feature. When enabled, the JTAG debugger is locked out and debugging or tracing is impossible.
The debug implementation on the MPC5XXX does not allow to detect if a processor is censored or not. The indication of active censorship is that reading the JTAGID works, but any further accesses fail. The debugger will report a Emulation Debug Port Fail error and the additional error description in the message AREA will look like follows:
    Error: received invalid OSR (0x000)
    is the device censored?
If the processor was censored on intention, it is possible to regain access using this command sequence:
  • If the password (keycode) is unknown or illegal (e.g. after accidentally erasing the shadow row), the processor is locked forever and can not be recovered, unless the application in flash provides a feature to unlock the processor (e.g. via CAN).
  • Some processors require the upper and lower 32-bit parts to be exchanged for SYStem.Option.KEYCODE (e.g. 0xCAFEBEEFFEEDFACE instead of 0xFEEDFACECAFEBEEF)


EBI problems on MPC5510 (MPC55XX)

Ref: 0325
The external bus interface (EBI) fails when the debugger (JTAG or NEXUS) is connected.

The cause of this problem is that there are two signals which are multiplexed between debugger and EBI usage: EVTI and EVTO.

For the MPC5510 series, the function of these signals is controlled by the EVT_EN bit in the NPC_PCR register, which again is controlled by the debugger. The debugger will per default set the pin function to EVTI/EVTO. In order to use the signals for EBI (R/!W and !TA), use the EVTEN setting in the TrOnchip window:

TrOnchip.EVTEN ON ; signals have EVTI/EVTO function. EBI functions disabled (default)
TrOnchip.EVTEN OFF ; signals free for use by EBI or GPIO

  • If the NEXUS adapter LA-7610 is used, EVTI must be physically disconnected from the debug/trace connector, because the LA-7610 will permanently drive EVTI.

  • If the NEXUS adapter LA-7630 is used, the EVTI pin will be tristated if TrOnchip.EVTEN is set to OFF. It is recommended to disconnect EVTI/EVTO from the debug connector anyway (see below).

  • If the signals are used for EBI, it is strongly recommended to disconnect EVTI/EVTO from the debug connector. Unterminated signals can cause EBI problems, especially if the debugger is not connected.


Error Message: "emulation pod configuration error" (MPC55XX)

Ref: 0105
Error message "emulation pod configuration error" after starting the T32 ICD software

This error can have three sources:
  • The CPU selection in the SYStem window does not match the CPU on the target. Check if the selection matches the processor on the target. Try to use auto detection (PPC..XX selection) if available.
  • The CPU detection failed. Check the JTAG connection to the target.
  • The CPU on the target is not supported by the used debugger software release. In most cases there is additional information given in the AREA window.


Problems with displaying and/or tracing VLE code (MPC55XX)

Ref: 0285
The disassembly shows invalid code with many undef/align "instructions". Trace list shows FLOWERRORS. How can I fix this?

Please see section "Tracing VLE or mixed FLE/VLE applications" in debugger_mpc5500.pdf


Run-Time Memory Access Restrictions (MPC55XX/56XX)

Ref: 0346
Some variables show wrong values or can not be modified during run-time. What causes this problem and how can it be solved?

See chapter "Memory Coherency During run-time Memory Access" in debugger_mpc5500.pdf


XPC56XX EVB motherboard issues (MPC56XX)

Ref: 0361
What problems can cause that the debugger fails to connect to an XPC56XX EVB motherboard?

When working with the XPC56XX EVB motherboard + a processor minimodule, the debug and trace signals have more than one end point: The JTAG connector, the trace connector and the pin array on the motherboard. The end points are unterminated and can cause signal reflections which disturb debugging. Especially the branch line of TCK to the EVB motherboard can cause problems.

If the debugger fails to connect (configuration error or debug port fail), we recommend to disconnect the signal path to the motherboard, or at least terminate TCK at the XPC56XX EVB motherboard's pin array with a 220~470 Ohm resistor to GND.


Bus Errors in Internal SRAM (MPC5XXX)

Ref: 0144
Why does the debugger display bus errors (question marks) for the internal SRAM or local memories?

The SRAM and local memories have an ECC protection. After power-on, SRAM and the corresponding ECC bits hold random values. Therefore, depending on the combination of values, an ECC block (usually 64 or 32 bits) might or micht not be displayed as a bus error.
When an application is programmed to FLASH, it is the responsibility of the boot code to initialize the SRAM. Only if it is intended to run an application from SRAM (e.g. as early test or for flash programming), the SRAM must be initialized through the debugger using the command: Data.Set EA:0x40000000--0x4000BFFF %Quad 0x0000000000000000

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Last generated/modified: 22-Sep-2016