FAQs for PCP Debugger


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PDF document ( 53KB / 07-Sep-2016 )


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Break Bus commands not available

Ref: 0297
The TrOnchip window does not show the Break Bus settings are not available. When entering the commands the software reports they are locked.

The Break Bus is a feature of the chip where PCP is implemented in, so choose the correct CPU. If PCP is implemented in a TC1797, choose TC1797 as CPU.
PCP1 and PCP2 are generic CPUs for chips not (yet) directly supported by the debugger. In this case more dedicated configuration has to be done, and certain features such as trace, MCBS or handling End-of-Init protection are not supported.

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End-of-Init protection errors

Ref: 0296
The debugger reports various end-of-init protection error.

End-of-Init protection is a feature of the chip where PCP is implemented in, so choose the correct CPU. If PCP is implemented in a TC1797, choose TC1797 as CPU.
PCP1 and PCP2 are generic CPUs for chips not (yet) directly supported by the debugger. In this case more dedicated configurations have to be done, and certain features such as trace, MCBS or handling End-of-Init protection are not supported.

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register set undefined

Ref: 0295
After a SYStem.Up the register window shows "register set undefined".

Each PCP channel has its own set of registers. When PCP is stopped for debug, the contents of the registers are written back to PRAM where the debugger has access.
When no channel has been running yet, the debugger does not know which register set to display. This also affects the Data.List window, because the PC is also unknown. However opening a Data.List window by specifying a dedicated address or label works, e.g. Data.List P:0x0000 or Data.List myChannel .
A Step or Go is also not possible because the debugger does not know which channel to step or retrigger. For starting a certain channel an appropriate interrupt has to be generated manually.

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Step or Go not possible after break (PCP)

Ref: 0294
After breaking a PCP channel initially, it is not possible to step or resume a PCP channel. The PCP_ES register reports a DCR error.

For resuming PCP channel execution (e.g. for a Step or Go), the debugger retriggers the current PCP channel. If the channel is disabled, a DCR error occures (Disabled Channel Request error).
Register R7, bit CEN holds the information whether a channel is enabled or disabled. Some compilers (e.g. TASKING 3.0) allow to use R7 as a general purpose register while PCP still evaluates R7.CEN. For TASKING 3.0 the usage of R7 as a general purpose register may be disabled by using the --preserve-r7-flags compiler switch.

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Channel ID is not traced, triggered or filtered correctly (PCP2)

Ref: 0347
When using MCDS on-chip trace, the PCP channel ID is traced incorrectly and any configured filters and triggers are not working correctly.

The MCDS on-chip trace and trigger logic derives the PCP channel ID from the CPPN (Current PCP Priority Number), which is part of the R6 Register. However, the application may use R6 as General Purpose Register, overwriting the CPPN bits with arbitrary data. So the MCDS receives and uses an invalid channel ID for generating triggers, filters and trace output.
In case of the TASKING PCP C/C++ compiler, use the interrupt-enable compiler option for having the CPPN available in R6. This has the disadvantage that channels become interruptible. Channels can still be set non-interruptible via R7.IEN using the __ien(0) function in the respective channel.

Command line switch:
  --interrupt-enable
IDE menu entry:
  1. Select Global Options "Channel Configuration".
  2. Enable the option "Allow channel to be interruptible".
Necessary application modification:
Add the function qualifier __cppn() to your channel program function declaration to define the interrupt priority of an interruptible function:
void __interrupt( channel_number ) __cppn(CPPN) isr( void )
{
    ...
}
See the TASKING PCP C/C++ compiler documentation for further information.




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Last generated/modified: 22-Sep-2016