Frequently Asked Questions The embedded tools company
AUTOFOCUS BDMXC800 ICRETM
BDM BDMZSP ICRNIOS
BDM56000 ESI INSTALL
BDM68K FIREH8S INTECLIPSE
BDMARC FIREPPC LICENSE
BDMARM FIRESH2 MON
BDMCBC FLASH MON166
BDMCF HA120 MON186
BDMM32R HOSTDRIVER MON386
BDMMICROBLAZE ICE NEXUS
BDMNIOS ICE08 NEXUSM32
BDMPCP ICE11 NEXUSMAC
BDMPPC ICE12 NEXUSMCORE
BDMPPC400 ICE166 NEXUSPPC
BDMPPC440 ICE386 NEXUSPPC5500
BDMPPC5100 ICE51 NEXUSSUPER10
BDMPPC5500 ICE68020 POWERVIEW
BDMPPC600 ICE68300 RTOS
BDMPPC8600 ICE68330 RTOSECOS
BDMPPCALTIVEC ICE68360 RTOSLINUX
BDMPPCPQ2 ICE80 RTOSSYMBIAN2
BDMPPCPQ3 ICEARM SIM
BDMTC ICEMELPS SIMARC



Frequently Asked Questions

TOP       FAQ for ALL
CPU Reference
T32Start T32Start Saving Location
TOP       FAQ for AUTOFOCUS
CPU Reference
ARM Analyzer Data Capture failed in DEMUX2 Mode
ARM ETM Trace Port Bandwidth
TOP       FAQ for BDM/JTAG Debugger
CPU Reference
  Setting a Software Breakpoint fails
TOP       FAQ for ONCE-56K
CPU Reference
  Cannot release from Software Breakpoint
56800/56800E PC Register is not equal to Program Counter
56800E AnySymbol Option for Metrowerks 800E
56800E Pointer has wrong Width
TOP       FAQ for BDM-68K
CPU Reference
68360 M68360 QUADS Board and BDM
683XX DTACK ERROR
68K 3.3 V support for 68K CPU's
TOP       FAQ for JTAG-ARC
CPU Reference
ARC Viewing Auxiliary Register
TOP       FAQ for JTAG-ARM
CPU Reference
  Error Message Emulator Berr Error
  Unstable Data
TOP       FAQ for OCDS CBC
CPU Reference
  "SYStem.Up" does not work
  Debugging in Idle Mode
  Single Step on Extended Sequence
  Software Breakpoint on extended Sequence
TOP       FAQ for BDM-CF
CPU Reference
COLDFIRE eTPU Debugger
TOP       FAQ for JTAG-M32R
CPU Reference
M32R Compiler Option for Debug Information
TOP       FAQ for BDM-MICROBLAZE
CPU Reference
MICROBLAZE Connection to Target Fails
MicroBlaze Fail of Single Stepping
MicroBlaze Go.Up Command Fails
MicroBlaze Loading C++ programs
MicroBlaze MC Settings Calculation
MICROBLAZE No Source Code shown on Xilinx Targets
MicroBlaze On-chip Data Breaks with unaligned Memory
MicroBlaze On-chip Databreak Problem
MicroBlaze Problems with Source Code Display
MicroBlaze Setting Register R0 fails
MicroBlaze Software Breakpoints or Single Stepping fail with ucLinux
MicroBlaze Target Connection
MicroBlaze Trace Interface for MicroBlaze
TOP       FAQ for BDM-NIOS
CPU Reference
NIOS Instantiating the Off-chip Trace Logic
NIOS Trace for Nios II doesn't work correctly
TOP       FAQ for PCP Debugger
CPU Reference
  Break Bus commands not available
  End-of-Init protection errors
  register set undefined
  Step or Go not possible after break
TOP       FAQ for BDM-PPC
CPU Reference
  Sporadic Debug Port Fail
MPC5XX/8XX Cannot write to SYPCR
MPC5XX/8XX ICTRL register access
MPC5XX/8XX Step or Go can't be executed Successful
MPC5XX/8XX With connected debugger program behaves in a different way
MPC8XX/5XX Exceptions and Stepping
MPC8XX/5XX Software runs differently with ICD
MPC8XX/5XX Using NOTRAP Option
MPC8XX/5XX What means "stopped by SEI"?
MPCXXX Runtime Accuracy
MPCXXX Verify Error at Single-Step or Breakpoint
TOP       FAQ for BDM-PPC400
CPU Reference
IOP480 Wrong Reset Address
PPC400 Connection to Target Fails
PPC405 No Source Code shown on Xilinx Targets
PPC4XX Emulation Debug Port Problem
PPC4XX Software Breakpoints Problem
Virtex-PPC400 Flow Errors
Virtex-PPC400 Flow Errors while Tracing works
VIRTEX-PPC405 ISOCM Access in Xilinx VirtexFX Chips
Virtex-PPC4XX Debugging and Tracing Embedded PPC Cores in Xilinx FPGAs
TOP       FAQ for BDM-PPC440
CPU Reference
PPC440 Connection to Target Fails
PPC440 No Source Code shown on Xilinx Targets
PPC440GX Enable/configure mixed TRACE Interface
PPC4XX Software Breakpoints Problem
VIRTEX-PPC440 ISOCM Access in Xilinx VirtexFX Chips
Virtex-PPC4XX Debugging and Tracing Embedded PPC Cores in Xilinx FPGAs
TOP       FAQ for JTAG-MGT5100
CPU Reference
MGT5100/MPC5200 Instruction/Data Address Breakpoints do not work
MPC5100/5200 Error Message: "emulation pod configuration error"
TOP       FAQ for JTAG-MPC5500
CPU Reference
MPC55XX Accessing Flash Memory via Nexus R/W
MPC55XX Bus Errors in Internal SRAM
MPC55XX Error Message: "emulation pod configuration error"
MPC55XX eTPU Debugger
MPC55XX Flash programming after ECC error
MPC55XX Flash Programming Errors
MPC55XX Using Cache as SRAM / Bus Error on locked Cache line
MPC55XX VLE/FLE display issues
TOP       FAQ for BDMPPC600
CPU Reference
MPC600/7XX Error Message: "emulation pod configuration error"
MPC603/7XX/74XX !QACK Termination
TOP       FAQ for JTAG-PPC-86XX
CPU Reference
MPC744X/745X/MPC86XX SYStem.UP fails
TOP       FAQ for JTAG-PPC-ALTIVEC
CPU Reference
MPC744X/745X Flash/Memory Mapped Registers Invisible
MPC744X/745X/MPC86XX SYStem.UP fails
MPC74XX Error Message: "emulation pod configuration error"
MPC74XX Instruction/Data Address Breakpoints do not work
TOP       FAQ for JTAG-PQ2
CPU Reference
MPC826x/80/7x/41/42 BUS-ERRORS on valid addresses
MPC82XX Problems when changing IMMR (software before 11/2007)
MPC82XX Problems when changing IMMR (sw since 11/2007)
MPC82XX Processor seems to step backwards
MPC82XX SYStem.Option.BASE.AUTO does not work
MPC82XX SYStem.Option.IP.AUTO does not work
MPC82XX SYStem.UP fails when flash is not programmed
MPC82XX/83XX Cannot write to SYPCR
MPC82XX/83XX Error Message: "emulation pod configuration error"
MPC82XX/83XX Instruction/Data Address Breakpoints do not work
MPC83XX SYStem.UP fails when flash is not programmed
TOP       FAQ for JTAG-PQ3
CPU Reference
MPC85XX Breakpoints and HLL steps do not work
MPC85XX Breakpoints are not working properly
MPC85XX CPU stops unexpected when booting Linux
MPC85XX Debugging Critical Interrupts
MPC85XX Error Message: "emulation pod configuration error"
MPC85XX Imprecise Debug Event
MPC85XX Initializing internal L2 SRAM
TOP       FAQ for OCDS TriCore
CPU Reference
  Breakpoints in Peripherals Modules
  CPU "stopped by XXXevt"
  On-chip Breakpoints and Memory Protection
  Unable to Erase or Program Flash Memory
Audo-NG Unable to do a Step or Go Command
older Single Step after SYStem.Mode Attach
TC10GP TriCore Data Cache
TC11Ix TriCore Data Cache
TC11XX Unable to do a Step or Go Command
TC1766 FLOWERROR when using OCDS-L2 Trace
TC1766ED FLOWERROR when using OCDS-L2 Trace
TriCore Single Step after SYStem.Mode Attach
TOP       FAQ for OCDS-XC800
CPU Reference
  OMF2 symbol loading
TOP       FAQ for JTAG-ZSP
CPU Reference
ZSP5XX Break after sys.up failed. Debug monitor (DMC) missing
ZSP5XX Break in SW Debug Mode fails
ZSP5XX Evaluation Board Problems
ZSP5XX Internal and External Memory
ZSP5XX Invalid Program Memory Content
ZSP5XX Limitation of Debug Mode
ZSP5XX No Detection of Halt Mode
ZSP5XX Number in Brackets after a CEXE Instruction
ZSP5XX On-chip Breakpoint Ignoration
ZSP5XX Setting Program Counter in HW Debug Mode
ZSP5XX Sign "%-" in Disassembler Output
ZSP5XX Single Step Fail
ZSP5XX Single Stepping Modifies %smode Register
ZSP5XX Stop Problems in Single Step Mode
ZSP5XXSimulator Generic MDI Error
ZSP5XXSimulator Program Fails after Reloading
ZSP5XXSimulator Script Fails with "Access Timeout"
TOP       FAQ for ESI
CPU Reference
  ESICON Adapter
TOP       FAQ for FIRE-H8S
CPU Reference
H8S BurstROM Interface
TOP       FAQ for FIRE-PPC
CPU Reference
MPC850/823 Upper Address Lines on MPC850/823
MPC8XX Access classes on MPC8xx
MPC8XX Breakpoints don't work
MPC8XX CPU does not Stop
MPC8XX Debug Port Fail
MPC8XX Device
MPC8XX Hints when Debugging PowerPC with Cache
MPC8XX Key Registers
MPC8XX Low Power Modes
MPC8XX SEI Interrupt
MPC8XX Verify Error at Single-Step or Breakpoint
MPC8XX/5XX Exceptions and Stepping
TOP       FAQ for FIRE-SH2
CPU Reference
SH-2 Dualport Access to On-chip RAM
SH-2 Dump of External Memory in Mode ROM
SH-2 Illegal-Slot-Instruction Exception
TOP       FAQ for FLASH
CPU Reference
  List of supported FLASH Devices
MPC55XX Flash Programming Errors
TOP       FAQ for HA120
CPU Reference
  TRACE-Analyzer Questions and Answers
TOP       FAQ for Host Driver
CPU Reference
  Fixed Width Font t32sys not found
  Font Problems on Linux
  Missing shared library for Linux
  Missing shared library for Solaris
  Multiple PODBUS USB devices
  Network Preparation for Access by Lauterbach Support
  No TRACE32 window is comming up on Unix
  Prerequisites for Linux
  Prerequisites for USB on Linux
  Sending Commands Remote via t32rem.exe
  Switch off cleartype font usage
  USB Debugger not detected by Linux
  USB Debugger not detected by Windows
  Using 3 GB RAM for TRACE32 task under Windows
  Using TRACE32 via USB with VMware
  WARNING about obsolete Driver (WINDOWS only)
TOP       FAQ for TRACE32-ICE
CPU Reference
  Target Power Supply Switch
  Wrong Location after Break
TOP       FAQ for ICE-08
CPU Reference
HC05JJ/JP Mask Option Register
HC08 Problems with EEPROM
HC08AZ/AT TimerB and CAN Module
TOP       FAQ for ICE-11
CPU Reference
  CONFIG Register Cannot be Modified
68HC11 Start-up Problems
TOP       FAQ for ICE-12
CPU Reference
HC12 Trace Shows Cycles after Break
HC12 Unexpected BKGD Instruction in the Trace List
TOP       FAQ for ICE-166
CPU Reference
  Power-Down Mode
  Update C167E2 to C167E3
BONDOUT C167 Bondout Errata Sheet
BONDOUT Clock Errors on E2 Bondout
BONDOUT Mixed MUX/NOMUX Operation
BONDOUT Wrong Clock Frequency on E2 Bondout
E1 C167 Bondout Errata Sheet
E2 Clock Errors on E2 Bondout
E2 Wrong Clock Frequency on E2 Bondout
TOP       FAQ for ICE-386
CPU Reference
  Break Error
  Clip-Over Adaption 386/486
386EX 386EX Dualport Error
TOP       FAQ for ICE-51
CPU Reference
  Bank Number for Bank File (*.bnk)
  Banking using 8051 Ports
  CPU Internal Memory Externally
  Differences Bond-out vs. non Bond-out
  Reset while Real Time Program Execution
  Stop Internal Watch-dog Timer
  Trace Internal Registers
TOP       FAQ for ICE-68020
CPU Reference
68020 Dataselectors on Misalligned Addresses
68020 Problems with Target Reset Detection
68020 Single Stepping of FPU Instructions
68020 Target PowerUp Emulation
68030 STERM Buscycles (68030 only)
TOP       FAQ for ICE-68300
CPU Reference
68302D Wrong Exception Vectors
68LC/PM302 Wrong Addresses in PC and Analyzer Listing
68XXX Watchdog/Timer
TOP       FAQ for ICE-68330
CPU Reference
68332 Clip-Over Adaption 68332/68HC16Z
TOP       FAQ for ICE-68360
CPU Reference
68360 Error Message "Emulation Memory Refresh Fail"
68360 Problems at PLL Register Modification
68360 Start-up
68360 Trace Listing does not work
TOP       FAQ for ICE-80
CPU Reference
Z80C15 Z84C11/C13/C15 Emulation
TOP       FAQ for ICE-ARM
CPU Reference
  3.3 V Emulation
TOP       FAQ for ICE-MELPS
CPU Reference
M377XX Mitsubishi FAQ
TOP       FAQ for ICR-ETM
CPU Reference
ARM Analyzer Data Capture failed in DEMUX2 Mode
ARM Differences between Pin 14 and 12 of ETM Connector
ARM ETM Register tells Wrong Core Type
ARM ETM Trace Port Bandwidth
ARM Function of the EXTRIG on the ETM Connector
ARM Identification of Preprocessor (CPU Trace Adapter)
ARM What does Flowerror or Harderror mean?
ARM Why do TraceOn/TraceOff Breakpoints not work?
TOP       FAQ for ICR-NIOS
CPU Reference
NIOS Instantiating the Off-chip Trace Logic
NIOS Trace for Nios II doesn't work correctly
TOP       FAQ for Installation
CPU Reference
  Remove TRACE32 Driver from Registry
  Silent mode of TRACE32 installer
TOP       FAQ for Eclipse
CPU Reference
INT Eclipse Plug-in for Coupling with TRACE32
TOP       FAQ for LICENSE
CPU Reference
  License Issue after Software Update
TOP       FAQ for ROM Monitor
CPU Reference
  EPROM Simulator Error on Data Modification
  Step or Breakpoint Fails
  Stepping Fails when Executing MOV SP,xxx
TOP       FAQ for MON-166
CPU Reference
  Stepping Fails after Enabling the Interrupts
  Target Peripherals cannot be modified by Data.Set
TOP       FAQ for MON-186
CPU Reference
80186 186EM/ES/ER: Emulator Crash after RESET
80186 Manual Break Fails
TOP       FAQ for MON-386
CPU Reference
80386 Manual Break Fails
TOP       FAQ for NEXUS
CPU Reference
  Connect a Nexus Probe to a PowerTrace Unit
  Incorrect Nexus-POD CPLD Revision
  Missing Address Information on Top of the Trace
TOP       FAQ for NEXUS-M32
CPU Reference
  Target Aux Port Connector Location and Extension Cables
TOP       FAQ for NEXUS-MAC
CPU Reference
  Target Aux Port Connector Location and Extension Cables
MAC71/72 MAC71/72 Front Connector Pinout
NEXUS-MAC71/72 Nexus Data Trace
NEXUS-MAC71/72 Nexus EVB MAC71/72
NEXUS-MAC71XX Dual-port Access to Internal Flash
NEXUS-MAC71XX Flash Programming Issue
NEXUS-MAC71XX JTAG-port Clock
NEXUS-MAC71XX Nexus EVB
NEXUS-MAC71XX Watchpoint Behavior
TOP       FAQ for NEXUS-SUPER10
CPU Reference
  Target Aux Port Connector Location and Extension Cables
TOP       FAQ for NEXUS-PPC
CPU Reference
  Target Aux Port Connector Location and Extension Cables
MPC5XX/8XX Cannot write to SYPCR
NEXUS-MPC56X Available Nexus Adaptions
NEXUS-MPC56X AXIOM EVA-Board for 561/3
NEXUS-MPC56X BDM-Debugport Fails after Changing Clock Frequency
NEXUS-MPC56X Comparision PowerTrace-NEXUS to RISC Trace
NEXUS-MPC56X Different Address Space for BDM vs. Nexus
NEXUS-MPC56X External Watch-Dog Timer (WDT)
NEXUS-MPC56X MDI/MDO Lines Disconnected in MDO2 Mode
NEXUS-MPC56X Nexus Debug Port Fail
NEXUS-MPC56X Nexus Probe (MNAD_x) Front Connector
NEXUS-MPC56X Port Replacement Feature
NEXUS-MPC56X Realtime Recording by NEXUS
NEXUS-MPC56X Required Slot for NEXUS Preprocessor
NEXUS-MPC56X TPU Registers are all Reset to Zero
NEXUS-MPC56X Trace Impacts , Full trace settings
NEXUS-MPC56X Usage of Nexus-pins or IO-pins
NEXUS-MPC56X Usage of the Terminal with NEXUS
TOP       FAQ for NEXUSPPC5500
CPU Reference
  Target Aux Port Connector Location and Extension Cables
MPC55XX Accessing Flash Memory via Nexus R/W
MPC55XX Bus Errors in Internal SRAM
MPC55XX Error Message: "emulation pod configuration error"
MPC55XX eTPU Debugger
MPC55XX Flash programming after ECC error
MPC55XX Flash Programming Errors
MPC55XX Using Cache as SRAM / Bus Error on locked Cache line
MPC55XX VLE/FLE display issues
NEXUS-MPC5500 Debugger Differences 4/12 Bit Mode
NEXUS-MPC5500 Debugger Impacts
NEXUS-MPC5500 JTAG-PQ2
NEXUS-MPC5500 Lost Messages
NEXUS-MPC5500 Nexus Class Support
NEXUS-MPC5500 Slow Reset
TOP       FAQ for NEXUS-SUPER10
CPU Reference
  Target Aux Port Connector Location and Extension Cables
TOP       FAQ for PowerView
CPU Reference
  COM10 and larger does not work
  CYGWIN Pathes
  Using an external Editor
TOP       FAQ for RTOS Debugger
CPU Reference
  Problems with Smbol Addresses
  Updates of Awareness Files
TOP       FAQ for RTOS-ECOS
CPU Reference
  Problems with Symbol Addresses
TOP       FAQ for RTOS-LINUX
CPU Reference
  "MMU.FORMAT LINUX swapper_pg_dir"
  "SYstem.Option MMU ON/OFF" Error
  Problems with Software Breakpoints
  TASK.MODULE Display Problems
TOP       FAQ for RTOS-SYMBIAN-EKA2
CPU Reference
  "TASK.CONFIG symbian" Errors
TOP       FAQ for SIM
CPU Reference
  Simulation of Peripherals by use of DLLs
TOP       FAQ for SIM-ARC
CPU Reference
ARC Viewing Auxiliary Register



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Copyright © 2008 Lauterbach Datentechnik GmbH, Fichtenstr. 27, D-85649 Hofolding, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice.
Last generated/modified: Apr-22-2008