CombiProbe for ARM®/Cortex®


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Extensions and Configuration
Standard Use Case Scenario
Further Scenarios
Adaptation


KINETIS Pelican STELLARIS STELLARISSTELLARIS

CombiProbe for ARM®/Cortex®
  Highlights
Debug cable and 128 MB of trace memory
Supports standard JTAG, Serial Wire Debug and cJTAG (IEEE 1149.7)
For trace ports with up to 4 trace data channels
Bandwidth of 200 MBit/s per trace channel
Supports 4-bit MIPI System Trace
Adapter for SD or Micro SD socket to support MIPI NIDnT
Supports ITM over Serial Wire Output or 4-bit TPIU
Supports 4-bit ETMv3 in Continuous Mode
Adapters are available for most common connectors
Voltage range 0.3 V to 3.3 V (5V tolerant)
Support for
 ACTEL, AD, AMBIQMICRO, ARM, CYPRESS, ENERGYMICRO, INFINEON, LUMINARYMICRO, MICROCHIP, MICROSEMI, NORDICSEMI, NXP, RENESAS, SAMSUNG, SILICONLABS, STM, TI, TOSHIBA

A2F060, A2F200, A2F500, ADSP-CM402F, ADSP-CM403F, ADSP-CM407F, ADSP-CM408F, ADUCM301, ADUCM3027, ADUCM3029, ADUCM310, ADUCM320, ADUCM320I, ADUCM322, ADUCM330, ADUCM331, ADUCM350, ADUCM360, ADUCM361, ADUCM362, ADUCM363, AMAPH1KK, APOLLO256, APOLLO512, AT91SAM3A4C, AT91SAM3A8C, AT91SAM3N00A, AT91SAM3N00B, AT91SAM3N0A, AT91SAM3N0B, AT91SAM3N0C,
> more


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[en.wikipedia.org]  MIPI Debug Architecture on Wikipedia




 
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Extensions and Configuration


Configuration of CombiProbe for ARM

 
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Standard Use Case Scenario


Debug and Record System Trace Information

  • Debugging via JTAG, SWD and cJTAG
  • System Trace via 4-bit TPIU or dedicated trace port

Form Factor Testing

Instead of debug and trace via dedicated connectors a functional interface of the final product can be used. Currently it is possible to use the SD or Micro SD interface as defined by MIPI Approved Specification: Specification for Narrow Interface for Debug and Test (NIDnT).


 
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Further Scenarios


CombiProbe for Cortex®-M

The CombiProbe was origianlly designed as a combined debug and trace tool for Cortex®-M, but has now been superseded by the µTrace® which provides a more cost effective solution.

Core Trace and System Trace on Separate Trace Ports

For most ARM®/Cortex®-designs System Trace and core trace information is merged and exported via the TPIU. For designs where the System Trace information is not merged and is exported via a separate trace port the following tool chain will allow the user to record and correlate both types of trace information.

  • Power Debug Interface USB 3.0 or Power Debug PRO
  • CombiProbe as debug cable and as System Trace analyzer
  • PowerTrace II and AutoFocus II preprocessor as core trace analyzer


 
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Adaptation


Adaptation for MIPI Debug Connectors (ARM)





Copyright © 2017 Lauterbach GmbH, Altlaufstr.40, D-85635 Höhenkirchen-Siegertsbrunn, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice. Report Errors
Last generated/modified: 06-Oct-2017