Xtensa Debugger


The embedded tools company


Picture
  Highlights
Full high-level and assembler debugging
Batch Processing
Support for Internal Triggers
Unlimited Software Breakpoints
Target voltage 0.4 .. 5.0 V
Core Reset detection
Little- and Big-Endian support
Fast download (ETHERNET, PARALLEL, USB)
Support for TENSILICA
Support for DC_108MINI, DC_212GP, DC_232L, DC_330HIFI, DC_454CK, DC_570T


Link Volt
Operation Voltage
Order
Order
Information
Support
Technical Support
[www.tensilica.com]  Tensilica Home Page


Demo Software for Download
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Features


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Function


Software Compatible to In-Circuit Emulator

  • Operation System
  • PRACTICE
  • ASM Debugger
  • HLL Debugger for C,C++
  • Peripheral Windows

Trigger

  • Input from PODBUS
  • Output to PODBUS

Support for EPROM/FLASH Simulator

  • Breakpoints in ROM Area
  • 8, 16 and 32 Bit EPROM/FLASH Emulation

Full Memory Access

  • Display/Read/Write of target memory
  • Set/Delete Breakpoints
  • Full access to Auxiliary memory space

Variable Debug Clock Speed

  • 10 kHz...50 MHz
  • about 2/3 core clock
  • Variable up to 100 MHz (PowerDebug only)

High-Speed Download

  • 50 KByte/sec @ 12MHz core clock

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IDE - Integrated Development Environment


ASM Debugger
  • Supports almost all file formats
  • Assembler source-level debugging
  • Advanced memory display
  • Inline assembler
  • Memory tests
  • Customizable windows
  • Peripheral windows
  • Terminal window
  • Semi-hosting
  • Flash programming
  • Full support for peripherals
High-Level-Language Debugging
  • Supports multiple languages
  • Full support for C++
  • Integrated into TRACE32 environment
  • Supports most compilers and hosts
  • Same user interface on different hosts
  • High speed download
  • Debugs optimized code
  • Display of function nesting
  • Display of linked lists
  • Powerful expression evaluation
Compiler Support

C/C++

  • GNU-GCC (Free Software Foundation, Inc.)
    • ELF/DWARF
  • METAWARE C/C++ (Synopsys, Inc)
    • ELF/DWARF
Multicore Debugging
  • Debugging support for homogeneous and heterogeneous multiprocessor and multicore systems
  • High quality standard debuggers can be combined for multiprocessor and multicore systems
  • All TRACE32-ICD debuggers are designed to work together in a multiprocessor/multicore debugging environment
  • Fast integration of third party debuggers
  • Several processors in a single piece of silicon can share the same debug port
  • Start and stop synchronisation
Logical Display of Periperals
  • Display of onchip peripherals
  • User definable windows
  • Interactive window definition with softkey support
  • Pulldown menues for selection of choices
  • Additional description for each field
Script Language PRACTICE
  • Structured Language
  • Menu Support
  • Command Logs
  • Custom Menues
  • Custom Toolbars and Buttons
  • Custom Dialog Windows
  • 64-Bit Arithmetic
  • Numeric, Logical and String Operators
  • Direct Access to System States
NOR FLASH Programming
  • Internal and/or external NOR FLASH memories
  • All common NOR FLASH types
  • Programming of multiple NOR FLASH devices
  • Provided by debuggers and in-circuit emulators
NAND FLASH Programming
  • Generic and CPU-specific NAND FLASH controllers
  • Support all common NAND FLASH devices
  • Bad block treatment (skipped, reserved block area)
  • ECC generation
SIM Instruction Set Simulators
  • Easy high-level and assembler debugging
  • Interface to all compilers
  • Trace Buffer
  • Powerful script language
  • Software compatible to all TRACE32 tools
  • Hardware simulation
RTOS
RTOS Support
3rd Party Integration
3rd Party Tool Integration
Help System
  • Acrobat Based Documentation
  • Fast Text Search
  • Device Specific Filtering
  • Basic and Advanced Help
  • Training Manuals Included
  • WWW Update
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Adaption


Adaption for Xtensa

Half-Size Adapters for Debuggers
  • 100 mil to 50 mil Adapters
  • Small Footprint for Target Connector

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Details and Configurations


DC_108MINITensilica
DC_212GPTensilica
DC_232LTensilica
DC_330HIFITensilica
DC_454CKTensilica
DC_570TTensilica




Copyright © 2012 Lauterbach GmbH, Altlaufstr.40, D-85635 Höhenkirchen-Siegertsbrunn, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice.
Last generated/modified: 1-Feb-2012