Power Debug Interface USB 3


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Function
Software
Extensions


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  Highlights
Support for a wide range of on-chip debug interfaces
Easy high-level and assembler debugging
Interface to all compilers
Fast download
RTOS awareness
Interface to all hosts
Display of internal and external peripherals at a logical level
Flash programming
Hardware breakpoints and trigger (if supported by chip)
Multiprocessor/multicore debugging
Software trace
Virtual analyzer
USB 3 Interface
 
  Introduction
The Lauterbach product TRACE32-ICD supports a wide range of on-chip debug interfaces. The hardware for the debugger is universal and allows to interface different target processors by simply changing the debug cable and the software.


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Function


Support Chips



Many Software Debuggers available



High-Speed Download

  • Up to 5000 KByte/sec
  • Fastest JTAG Debugger worldwide


      ProcessorkByte/secJTAG Clock Speed
      PowerPC (PQ3)520050 MHz
      NIOS-II (Altera)200040 MHz
      Tricore125025 MHz
      ARM940125030 MHz
      MPC860170040 MHz
      SH482020 MHz

Multicore Debugger

  • Debugging of Multicore Systems
  • Tristate Operation for Multicore Debugging with 3rd Party Debuggers
  • Control of target-based multiplexers
  • Free selection of TAP position in chain
  • Mixed support of DSP and controller in one chip

Support for EPROM/FLASH Simulator

  • Breakpoints in ROM Area
  • 8, 16 and 32 Bit EPROM/FLASH Emulation

Power Consumption

  • 2/5 W
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Software


ASM Debugger
  • Supports almost all file formats
  • Assembler source-level debugging
  • Advanced memory display
  • Inline assembler
  • Memory tests
  • Customizable windows
  • Peripheral windows
  • Terminal window
  • Semi-hosting
  • Flash programming
  • Full support for peripherals
High-Level-Language Debugging
  • Supports multiple languages
  • Full support for C++
  • Integrated into TRACE32 environment
  • Supports most compilers and hosts
  • Same user interface on different hosts
  • High speed download
  • Debugs optimized code
  • Display of function nesting
  • Display of linked lists
  • Powerful expression evaluation
Intelligent Loader
  • Up to 30 times faster download speed
  • Differential loader especially designed to speed-up iterative edit/compile/load cycles
  • Zipped download for large files
  • Memory contents are verified by checksum instead of reading memory
Memory Analysis
  • Display of allocated memory blocks
  • Memory allocation Statistics
  • Check for out-of-bounds writes
  • Trace of allocation calls
  • Graphical displays of memory usage
Logical Display of Peripherals
  • Display of onchip peripherals
  • User definable windows
  • Interactive window definition with softkey support
  • Pulldown menues for selection of choices
  • Additional description for each field
Trace-based Profiling
  • Detailed analysis of function run-times
  • Detailed analysis of task run-times and state
  • Graphical analysis of variable values over the time
  • Analysis of the time interval of a single event (e.g. Interrupt)
  • Analysis of the time interval between 2 defined events
Sample-based Profiling
  • Long-time performance analysis for functions
  • Long-time performance analysis for tasks
  • Long-time analysis of the contents of a variable or memory location and more
Trace-based Code Coverage
  • Real-time code coverage without instrumentation
  • Suitable for long-term testing
  • Analysis for both assembly and source code level
  • Off-line review capabilities
  • Full support of multicore chips
Snooper
  • Samples memory while application is running
  • Support for special debug communication channels
  • All trace display and analysis functions can be used
  • Trigger on specific values
  • Dynamic performance analysis
OS-aware Debugging
  • Statistic evaluation and graphic display of task run times
  • Task related evaluation of function run times
  • Statistic evaluation and graphic display of task states
  • Manual executed system calls
  • Task stack coverage
  • PRACTICE functions for OS data
  • RTOS related pull-down menu
  • Task selective debugging
NOR FLASH Programming
  • Internal and/or external NOR FLASH memories
  • All common NOR FLASH types
  • Programming of multiple NOR FLASH devices
  • Provided by debuggers and in-circuit emulators
NAND FLASH Programming
  • Generic and CPU-specific NAND FLASH controllers
  • Support all common NAND FLASH devices
  • Bad block treatment (skipped, reserved block area)
  • ECC generation
SIM Instruction Set Simulators
  • Easy high-level and assembler debugging
  • Interface to all compilers
  • Trace Buffer
  • Powerful script language
  • Software compatible to all TRACE32 tools
  • Hardware simulation

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Extensions


FLEX Adapter
  • Highly Flexible Adapters
  • For Debuggers and ICD Trace
  • High Signal Quality
  • Adapted Impedance
  • MICTOR
  • 100 MIL
  • SAMTEC
  • YAMAICHI
Half-Size Adapters for Debuggers
  • 100 mil to 50 mil Adapters
  • Small Footprint for Target Connector
Logic and Protocol Analyzer (PowerProbe)
  • Timing Analyzer up to 400 MHz
  • State Analyzer up to 100 MHz
  • 64 Input Channels
  • Transient Recording
  • Time Correlation with RISC Trace
  • Clock Qualifier for State Clock
  • Mixed State and Timing Mode
  • 4 State Clock Inputs
  • Optional FPGA Onchip Trace
  • Optional Pattern Generator
  • Protocol Support for CAN, USB, etc.
Bus Analyzer (PowerIntegrator)
  • Timing Analyzer with 500 MHz on all Channels
  • State Analyzer up to 200 MHz DDR
  • 204 Input Channels
  • Transient Recording
  • Time Correlation with other Tracetools
  • Clock Qualifier for State Clock
  • Mixed State and Timing Mode
  • 4 Clock Inputs
  • MICTOR and Standard Probes (single ended)
  • MICTOR differential Probes
  • Analog Voltage and Current Probe
  • 3G/DigRF Protocol Support
EPROM/FLASH Simulator
  • 8, 16 or 32 Bit Operation
  • 2, 8, 16 or 64 MBit Versions
  • DIL or PLCC Adapters
  • SO Adapter
  • TSOP Adapter
  • ESI-CON for In-Circuit Simulation
  • Monitor Control
  • NMI and RESET Generation
Trigger Probe
  • Works with ICE, FIRE and ICD
  • Asynchronous Trigger
  • Synchrounous Trigger
  • Pulse Width Trigger
  • Glitch Trigger
  • Scope Trigger Output





Copyright © 2014 Lauterbach GmbH, Altlaufstr.40, D-85635 Höhenkirchen-Siegertsbrunn, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice.
Last generated/modified: 22-Apr-2014