PPC440 Debugger


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GEMINI VIRTEX-5

Picture
  Highlights
Full HLL and ASM support available
Batch processing
Supports ELF/DWARF format
3.3 Volt support
Support for internal triggers
Break on code or data
Unlimited software breakpoints
Fast download (ETHERNET or PARALLEL) up to 1000KB/sec
Support for AMCC, IBM, XILINX
Support for APM83290, PPC440, PPC440A[..], PPC440EP, PPC440EPX, PPC440G[..], PPC440GP, PPC440GR, PPC440GRX, PPC440GX, PPC440SP, PPC440SPE, PPC460EX, PPC460GT, PPC460SX
 
  Introduction
The debugger for IBM PowerPC 440 family allows fast access to the BDM interface of the chip. Up to 1 MByte can be downloaded in 1 second. The systems supports C, C++ and JAVA.


Link Doc
Download full document
bdmppc440.pdf
(313k)
Volt
Operation Voltage
FAQ
Frequently Asked Questions
Order
Order
Information
Support
Technical Support
[www.amcc.com]  AMCC Embedded Processors
[www-01.ibm.com]  IBM PPC440 Cores


Demo Software for Download
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Features


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Function


Software Compatible to In-Circuit Emulator

  • Operation System
  • PRACTICE
  • ASM Debugger
  • HLL Debugger for C,C++
  • Peripheral Windows

High-Speed Download

  • Up to 1 MByte/sec

Trigger

  • Input from PODBUS
  • Output to PODBUS

Support for EPROM/FLASH Simulator

  • Breakpoints in ROM Area
  • 8, 16 and 32 Bit EPROM/FLASH Emulation
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IDE - Integrated Development Environment


ASM Debugger
  • Supports almost all file formats
  • Assembler source-level debugging
  • Advanced memory display
  • Inline assembler
  • Memory tests
  • Customizable windows
  • Peripheral windows
  • Terminal window
  • Semi-hosting
  • Flash programming
  • Full support for peripherals
High-Level-Language Debugging
  • Supports multiple languages
  • Full support for C++
  • Integrated into TRACE32 environment
  • Supports most compilers and hosts
  • Same user interface on different hosts
  • High speed download
  • Debugs optimized code
  • Display of function nesting
  • Display of linked lists
  • Powerful expression evaluation
Compiler Support

C

  • HIGH-C (ARC International)
    • ELF/DWARF
  • CXPPC (Cosmic Software)
    • ELF/DWARF
  • CC (Freescale Semiconductor, Inc.)
    • XCOFF
  • XCC-V (GAIO Technology Co., Ltd.)
    • SAUF
  • GREEN HILLS C (Greenhills Software Inc.)
    • ELF/DWARF
  • GCC (HighTec EDV-Systeme GmbH)
    • ELF/DWARF
  • MCCPPC (Mentor Graphics Corporation)
    • ELF/DWARF
  • ULTRA C (Radisys Inc.)
    • ROF
  • DCPPC (TASKING)
    • ELF/DWARF
  • D-CC (Wind River Systems)
    • IEEE
    • COFF
    • ELF/DWARF

C++

  • HIGH-C++ (ARC International)
    • ELF/DWARF
  • GCC (Free Software Foundation, Inc.)
    • ELF/DWARF
  • GREEN HILLS C++ (Greenhills Software Inc.)
    • ELF/DWARF
  • CCCPPC (Mentor Graphics Corporation)
    • ELF/DWARF
  • MSVC (Microsoft Corporation)
    • EXE/CV5
  • D-C++ (Wind River Systems)
    • ELF/DWARF
  • GCCPPC (Wind River Systems)
    • ELF/STABS

C/C++

  • CODEWARRIOR (Freescale Semiconductor, Inc.)
    • ELF/DWARF

GCC

  • GCC (Free Software Foundation, Inc.)
    • ELF/DWARF

JAVA

  • FASTJ (Wind River Systems)
    • ELF/DWARF
Multicore Debugging
  • Debugging support for homogeneous and heterogeneous multiprocessor and multicore systems
  • High quality standard debuggers can be combined for multiprocessor and multicore systems
  • All TRACE32-ICD debuggers are designed to work together in a multiprocessor/multicore debugging environment
  • Fast integration of third party debuggers
  • Several processors in a single piece of silicon can share the same debug port
  • Start and stop synchronisation
Logical Display of Peripherals
  • Display of onchip peripherals
  • User definable windows
  • Interactive window definition with softkey support
  • Pulldown menues for selection of choices
  • Additional description for each field
Full MMU Support
  • Full integrated support of processor′s MMU
  • Display of processor MMU registers
  • Display of MMU table entries
  • Display of address translation table
  • ′Shadowing′ MMU address translation inside debugger
  • Full virtual and physical access to target at any time
  • Debugger has optionally write access to write protected memory areas
  • Detection and decoding of software MMU tables built by operating systems
  • Support for several user space MMU tables side by side
  • TLB context tracking and git statistics via CTS
Script Language PRACTICE
  • Structured Language
  • Menu Support
  • Command Logs
  • Custom Menues
  • Custom Toolbars and Buttons
  • Custom Dialog Windows
  • 64-Bit Arithmetic
  • Numeric, Logical and String Operators
  • Direct Access to System States
NOR FLASH Programming
  • Internal and/or external NOR FLASH memories
  • All common NOR FLASH types
  • Programming of multiple NOR FLASH devices
  • Provided by debuggers and in-circuit emulators
NAND FLASH Programming
  • Generic and CPU-specific NAND FLASH controllers
  • Support all common NAND FLASH devices
  • Bad block treatment (skipped, reserved block area)
  • ECC generation
SIM Instruction Set Simulators
  • Easy high-level and assembler debugging
  • Interface to all compilers
  • Trace Buffer
  • Powerful script language
  • Software compatible to all TRACE32 tools
  • Hardware simulation
Trace-based Profiling
  • Detailed analysis of function run-times
  • Detailed analysis of task run-times and state
  • Graphical analysis of variable values over the time
  • Analysis of the time interval of a single event (e.g. Interrupt)
  • Analysis of the time interval between 2 defined events
Trace-based Code Coverage
  • Long-Time Hardware Coverage Analysis for Emulator and ETM
  • Trace Based Coverage Analysis for ICD and Emulator
  • Analysis on ASM and HLL
  • Coverage summary on modul/function level
Sample-based Profiling
  • Long-time performance analysis for functions
  • Long-time performance analysis for tasks
  • Long-time analysis of the contents of a variable or memory location and more
Logger
  • Software trace of any size stored in an array structure on the target
  • General trace format provided by TRACE32-PowerView
  • Configuration and display commands provided by TRACE32-PowerView
  • Works as trace with address and data information
  • Works as a program flow trace (SH4, PowerPC)
  • Time stamp possible
  • Predefined algorithms to fill the trace provided by Lauterbach
  • User defined algorithms to fill the trace also possible
FDX (Fast Data eXchange) Framework
  • Interaction of target application with 3rd party host application
  • No additional hardware necessary
  • High bandwidth
  • Real time data transfer
  • Software trace capabilities
Snooper
  • Samples memory while application is running
  • Support for special debug communication channels
  • All trace display and analysis functions can be used
  • Trigger on specific values
  • Dynamic performance analysis
RTOS
RTOS Support
3rd Party Integration
3rd Party Tool Integration
Help System
  • Acrobat Based Documentation
  • Fast Text Search
  • Device Specific Filtering
  • Basic and Advanced Help
  • Training Manuals Included
  • WWW Update
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Trace Extension


RISC Trace for PowerPC 400 family

  • 100/200 MHz Trace Bus Operation
  • Up to 400 (800) MHz Core Clock
  • Up to 4 GByte trace memory
  • 16...256 MFrames
  • Code Coverage
  • Performance Analysis
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Adaption


JTAG Connector for PowerPC440

Half-Size Adapters for Debuggers
  • 100 mil to 50 mil Adapters
  • Small Footprint for Target Connector

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Details and Configurations


APM83290Applied Micro Circuits Corporation
PPC440XILINX
PPC440A[..]IBM Deutschland GmbH
PPC440EPApplied Micro Circuits Corporation
PPC440EPXApplied Micro Circuits Corporation
PPC440GPApplied Micro Circuits Corporation
PPC440GRApplied Micro Circuits Corporation
PPC440GRXApplied Micro Circuits Corporation
PPC440GXApplied Micro Circuits Corporation
PPC440G[..]IBM Deutschland GmbH
PPC440SPApplied Micro Circuits Corporation
PPC440SPEApplied Micro Circuits Corporation
PPC460EXApplied Micro Circuits Corporation
PPC460GTApplied Micro Circuits Corporation
PPC460SXApplied Micro Circuits Corporation




Copyright © 2012 Lauterbach GmbH, Altlaufstr.40, D-85635 Höhenkirchen-Siegertsbrunn, Germany  Impressum
The information presented is intended to give overview information only.
Changes and technical enhancements or modifications can be made without notice.
Last generated/modified: 9-May-2012