
|
Screenshot |
|
Features |
Full Memory Access
- Display/Read/Write of target memory while core is stopped or running
- Set/Delete Breakpoints while core is stopped or running
- Full access to auxiliary memory space
Full Onchip Breakpoint support
- Program breakpoints
- Address write breakpoints (Watchpoints)
- Address read breakpoints for ARC600/ARC700
- Data breakpoints for memory writes
- Breakpoits on auxiliary registers
- Instruction data breakpoints for ARC700
- Breakpoits on core registers for ARCtagent-A4/A5
Variable Debug Clock Speed
- 10 kHz...50 MHz
- up to 1/2 of the core clock
- variable up to 100 MHz
High-Speed Download
- 500 KByte/sec @ 50MHz JTAG clock
Hostlink Library Support
- Print messages from your target application directly to your TRACE32 GUI with a simple "printf"
- Open and save files on your host via your target application.
- Supports Metaware Hostlink Library
- Support Lauterbach Hostlink Library for GNU and Metaware compiler
Multicore Debugging
- Homegenous multicore debugging with other ARC cores
- Heterogeneous multicore debugging with ARC® and ARM®, MIPS® or ATOM™ cores
- Multicore debugging via JTAG Daisy Chain or MADI
- Other multicore configurations on request
|
Target Connector |
|
IDE - Integrated Development Environment |
|
Details and Configurations |
  | ARC-A4 | | ARC International, Synopsys, Inc |
  | ARC-A5 | | ARC International, Synopsys, Inc |
  | ARC601 | | ARC International, Synopsys, Inc |
  | ARC605 | | ARC International, Synopsys, Inc |
  | ARC610D | | ARC International, Synopsys, Inc |
  | ARC625D | | ARC International, Synopsys, Inc |
  | ARC630D | | ARC International, Synopsys, Inc |
  | ARC710D | | ARC International, Synopsys, Inc |
  | ARC725D | | ARC International, Synopsys, Inc |
  | ARC750D | | ARC International, Synopsys, Inc |
  | ARC770D | | ARC International, Synopsys, Inc |
|